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/** @file |
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* $Source: /home/cvsmanager/yoda/event/tmtc/TmtcRecord.h,v $ |
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* $Id: TmtcRecord.h,v 5.0 2005/08/29 09:46:12 kusanagi Exp $ |
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* $Author: kusanagi $ |
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* |
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* 16 May 2005 - added 4 more TM_TH_ANA. Updated the ClassDef to 2 |
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* |
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* Header file for the TmtcRecord class. |
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*/ |
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#ifndef TMTC_RECORD_H |
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#define TMTC_RECORD_H |
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#include "../SubPacket.h" |
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namespace pamela { |
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/** |
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* TmtcRecord data Wrapper |
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*/ |
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class TmtcRecord: public TObject { |
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private: |
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|
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public: |
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/** |
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* The On-Board-Time of the Record. |
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*/ |
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UINT32 TM_RECORD_OBT; |
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|
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/** |
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* Conctac closure and bi-livel single ended digital acquisitions data from the TMTC board. |
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* |
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* From MSB to LSB: (significant IDs is the last one) <br> |
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* TMTC_PACK_BIT(tm_val,TM_KRB_IPM1);<br> |
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* TMTC_PACK_BIT(tm_val,TM_KRB_IPM2);<br> |
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* TMTC_PACK_BIT(tm_val,TM_KRB_IPM3);<br> |
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* TMTC_PACK_BIT(tm_val,TM_KRB_IPM4);<br> |
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* TMTC_PACK_BIT(tm_val,TM_KRB_IPM5);<br> |
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* TMTC_PACK_BIT(tm_val,TM_KRB_IPM6);<br> |
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* <br> |
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* TMTC_PACK_BIT(tm_val,TM_KHB_HOT_LATCHUP);<br> |
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* TMTC_PACK_BIT(tm_val,TM_KHB_COLD_LATCHUP);<br> |
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* <br> |
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* TMTC_PACK_BIT(tm_val,TM_IDAQ_HOT_ALARM);<br> |
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* TMTC_PACK_BIT(tm_val,TM_IDAQ_COLD_ALARM);<br> |
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* <br> |
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* TMTC_PACK_BIT(tm_val,TM_VCB_STANDBY);<br> |
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* <br> |
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* TMTC_PACK_BIT(tm_val,TM_VRL_HOT);<br> |
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* TMTC_PACK_BIT(tm_val,TM_VRL_COLD);<br> |
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* <br> |
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* TMTC_PACK_BIT(tm_val,TM_PSB_ALARM);<br> |
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* <br> |
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* TMTC_PACK_BIT(tm_val,TM_TOFHV_HOT_ALARM);<br> |
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* TMTC_PACK_BIT(tm_val,TM_TOFHV_COLD_ALARM);<br> |
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*/ |
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UINT16 TM_DIAG_AND_BILEVEL_ACQ; |
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|
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/** |
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* Thermistor analogue acquisition data from the TMTC board. |
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* |
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* The order from 0 to 11 is the following: (significant name are inside brackets)<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_IPM_TH]);<br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_S1_TH]);<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_S4_TH]);<br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_S4_ND_PLATE_TH]);<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_TRK_TH1]);<br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_TRK_TH2]);<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_FLUID_IN_TH]);<br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_FLUID_OUT_TH]);<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_VME_TH]);<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_DCDC_TH]);<br> |
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* <br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_CPU_TH1]);<br> |
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* HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_CPU_TH2]);<br> |
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* <br> |
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* HB_WRITE_UINT16(unknow 1);<br> |
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* HB_WRITE_UINT16(unknow 2);<br> |
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* HB_WRITE_UINT16(unknow 3);<br> |
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* HB_WRITE_UINT16(unknow 4);<br> |
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*/ |
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UINT16 TM_TH_ANA[16]; |
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|
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|
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/** |
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* Digital data from the TMTC board. |
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* |
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* The order from 0 to 5 is the following: (significant name are inside brackets)<br> |
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* <br> |
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* HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM1]);<br> |
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* HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM2]);<br> |
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* HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM3]);<br> |
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* HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM4]);<br> |
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* HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM5]);<br> |
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* HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM6]);<br> |
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*/ |
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UINT8 TM_DEA_ANA[6]; |
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|
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TmtcRecord(void); |
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~TmtcRecord(void){}; |
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ClassDef(TmtcRecord, 2) |
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}; |
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} |
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|
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#endif /* TMTC_RECORD_H */ |
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