1 |
/**************************************************************************** |
2 |
/* F i l e D a t a |
3 |
/* |
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/* Module : SRAMManager |
5 |
/* C.I. No. : |
6 |
/* $Revision: 1.2 $ |
7 |
/* $Date: 2003/08/07 08:46:55 $ |
8 |
/* Belonging to : |
9 |
/* : |
10 |
/* $RCSfile: SD_SRAMDriver_op.c,v $ |
11 |
/* Program Type : |
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/* Sub-modules : |
13 |
/* |
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/**************************************************************************** |
15 |
/* S W D e v e l o p m e n t E n v i r o n m e n t |
16 |
/* |
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/* Host system : |
18 |
/* SW Compiler : |
19 |
/* $Author: wizard $ |
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/* : |
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/**************************************************************************** |
22 |
/* U p d a t i n g |
23 |
/* |
24 |
/* $Log: SD_SRAMDriver_op.c,v $ |
25 |
/* Revision 1.2 2003/08/07 08:46:55 wizard |
26 |
/* SIMULATOR bugfix ifdef/ifndef |
27 |
/* SM_PktSize update bug fix in SM_op_PageHasData in order to fix the laben bug of SM_pi_GetPacket |
28 |
/* introduced the notification to a task from the PageHasData |
29 |
/* |
30 |
/* Revision 1.1.1.1 2003/08/04 09:40:21 sebastiani |
31 |
/* Imported sources laben rel. 19.06.2003 integrated with pam2 |
32 |
/* |
33 |
/* Revision 1.11 2003/05/20 12:27:37 aurora |
34 |
/* removed wait loops for EM between two or more reads on PCMCIA |
35 |
/* |
36 |
/* Revision 1.10 2003/05/05 09:00:06 aurora |
37 |
/* correct the header length programming in DAQSetup |
38 |
/* |
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/* Revision 1.9 2003/04/29 13:30:01 aurora |
40 |
/* introduced the new register TRIG3 for manage page overrun every 64Kbyte |
41 |
/* |
42 |
/* Revision 1.8 2003/03/12 10:56:22 aurora |
43 |
/* added the provider for the counter of bytes left on CMD I/F queue |
44 |
/* |
45 |
/* Revision 1.7 2003/01/30 10:15:35 aurora |
46 |
/* introduced ifdef for EM and FM |
47 |
/* |
48 |
/* Revision 1.6 2002/10/17 10:07:14 zulia |
49 |
/* added SD_PIFReset |
50 |
/* |
51 |
/* Revision 1.5 2002/07/31 14:30:10 zulia |
52 |
/* Added driver for indipendent control of CMD I/F from DAQ I/F |
53 |
/* |
54 |
/* Revision 1.4 2002/05/09 08:16:35 zulia |
55 |
/* * acceptance release |
56 |
/* |
57 |
/* |
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/*****************************************************************************/ |
59 |
|
60 |
/*============================= Include File ================================*/ |
61 |
|
62 |
#include <src/SRAMManager/SRAMDriver/SD_SRAMDriver_op.h> |
63 |
|
64 |
/*============================== local define ===============================*/ |
65 |
|
66 |
/*============================== local types ================================*/ |
67 |
|
68 |
/*****************************************************************************/ |
69 |
|
70 |
/*====== S R A M D r i v e r P R O V I D E D I N T E R F A C E ======*/ |
71 |
|
72 |
/*****************************************************************************/ |
73 |
/* @Function: SD_opSRAMDriverInit */ |
74 |
/* @Purpose : */ |
75 |
/* Provided Interface to init the SRAM driver */ |
76 |
/* */ |
77 |
/* @@ */ |
78 |
/* @Parameter Name @Mode @Description */ |
79 |
/* SD_EXITCODE OUT Exit code */ |
80 |
/* @@ */ |
81 |
/*****************************************************************************/ |
82 |
|
83 |
SD_EXITCODE SD_opSRAMDriverInit(void) |
84 |
{ |
85 |
SD_EXITCODE status = SD_SUCCESS; |
86 |
|
87 |
return (status); |
88 |
} |
89 |
|
90 |
/*****************************************************************************/ |
91 |
/* @Function: SD_opSetDAQWritePage */ |
92 |
/* @Purpose : */ |
93 |
/* Provided Interface to select the SRAM page to hold new incoming data. */ |
94 |
/* */ |
95 |
/* @@ */ |
96 |
/* @Parameter Name @Mode @Description */ |
97 |
/* Page IN SRAM page to be selected in input */ |
98 |
/* @@ */ |
99 |
/*****************************************************************************/ |
100 |
|
101 |
void SD_opSetDAQWritePage(UINT32 Page) |
102 |
{ |
103 |
BYTE *reg; |
104 |
#ifndef SIMULATOR |
105 |
reg = (BYTE *) ALV_DPAGE; |
106 |
*reg = (BYTE)(Page & 0x000000FF); |
107 |
#endif |
108 |
} |
109 |
|
110 |
/*****************************************************************************/ |
111 |
/* @Function: SD_opIsDAQWriteOk */ |
112 |
/* @Purpose : */ |
113 |
/* Provided Interface to retrive the status uf the last DAQ I/F write into */ |
114 |
/* SRAM. */ |
115 |
/* */ |
116 |
/* @@ */ |
117 |
/* @Parameter Name @Mode @Description */ |
118 |
/* SD_TRANSFERSTAT OUT status of the last DAQ I/F SRAM write */ |
119 |
/* @@ */ |
120 |
/*****************************************************************************/ |
121 |
|
122 |
SD_TRANSFERSTAT SD_opIsDAQWriteOk(void) |
123 |
{ |
124 |
BYTE *reg; |
125 |
BYTE trok; |
126 |
#ifndef SIMULATOR |
127 |
reg = (BYTE *) ALV_DQEA3; |
128 |
trok = *reg; |
129 |
trok = (trok & 0x80)? SD_TRANSFEROK : SD_TRANSFERFAIL; |
130 |
return (trok); |
131 |
#else |
132 |
return SD_TRANSFEROK; |
133 |
#endif |
134 |
} |
135 |
|
136 |
/*****************************************************************************/ |
137 |
/* @Function: SD_opGetDAQWriteResult */ |
138 |
/* @Purpose : */ |
139 |
/* Provided Interface to retrive the end address of the data written by the */ |
140 |
/* DAQ I/F in the selected SRAM page. */ |
141 |
/* */ |
142 |
/* @@ */ |
143 |
/* @Parameter Name @Mode @Description */ |
144 |
/* SD_DAQ_RESULT OUT structure to hold the end address, page and */ |
145 |
/* status of the last DAQ I/F SRAM write */ |
146 |
/* @@ */ |
147 |
/*****************************************************************************/ |
148 |
|
149 |
SD_DAQ_WRESULT SD_opGetDAQWriteResult(void) |
150 |
{ |
151 |
SD_DAQ_WRESULT result = 0x00000000; |
152 |
#ifndef SIMULATOR |
153 |
BYTE data; |
154 |
UINT32 data32; |
155 |
BYTE *reg; |
156 |
|
157 |
reg = (BYTE *) ALV_DQEA3; |
158 |
data = *reg; |
159 |
data = data & 0x0000000f; |
160 |
data32 = ((UINT32)data << 14); |
161 |
result = data32; |
162 |
|
163 |
reg = (BYTE *) ALV_DQEA2; |
164 |
data = *reg; |
165 |
data = data & 0x0000003f; |
166 |
data32 = ((UINT32)data << 8); |
167 |
result |= data32; |
168 |
|
169 |
reg = (BYTE *) ALV_DQEA1; |
170 |
data = *reg; |
171 |
data = data & 0x000000ff; |
172 |
data32 = ((UINT32)data); |
173 |
result |= data32; |
174 |
#endif |
175 |
return (result); |
176 |
} |
177 |
|
178 |
/*****************************************************************************/ |
179 |
/* @Function: SD_opStartTransferToCMD */ |
180 |
/* @Purpose : */ |
181 |
/* Provided Interface to start the transfer of data stored in the pervoiusly*/ |
182 |
/* selected SRAM to the CMD I/F. */ |
183 |
/* */ |
184 |
/* @@ */ |
185 |
/* @Parameter Name @Mode @Description */ |
186 |
/* @@ */ |
187 |
/*****************************************************************************/ |
188 |
|
189 |
void SD_opStartTransferToCMD(void) |
190 |
{ |
191 |
BYTE *reg; |
192 |
|
193 |
reg = (BYTE *) ALV_CMD; |
194 |
*reg = DUMMYWRITE; |
195 |
} |
196 |
|
197 |
/*****************************************************************************/ |
198 |
/* @Function: SD_opWriteSRAM */ |
199 |
/* @Purpose : */ |
200 |
/* Provided Interface to write a data byte in the pervoiusly selected */ |
201 |
/* SRAM address. */ |
202 |
/* */ |
203 |
/* @@ */ |
204 |
/* @Parameter Name @Mode @Description */ |
205 |
/* data IN 8bit data to store into perviously selected */ |
206 |
/* SRAM address */ |
207 |
/* @@ */ |
208 |
/*****************************************************************************/ |
209 |
|
210 |
void SD_opWriteSRAM(UINT32 data) |
211 |
{ |
212 |
BYTE *reg; |
213 |
#ifndef SIMULATOR |
214 |
reg = (BYTE *) ALV_HBSRAM; |
215 |
*reg = (BYTE)(data & 0x000000FF); |
216 |
#endif |
217 |
} |
218 |
|
219 |
/*****************************************************************************/ |
220 |
/* @Function: SD_opReadSRAM */ |
221 |
/* @Purpose : */ |
222 |
/* Provided Interface to read a data byte from the pervoiusly selected */ |
223 |
/* SRAM address. */ |
224 |
/* */ |
225 |
/* @@ */ |
226 |
/* @Parameter Name @Mode @Description */ |
227 |
/* BYTE OUT 8bit data read from perviously selected */ |
228 |
/* SRAM address */ |
229 |
/* @@ */ |
230 |
/*****************************************************************************/ |
231 |
|
232 |
UINT32 SD_opReadSRAM(void) |
233 |
{ |
234 |
BYTE *reg; |
235 |
UINT32 data=0; |
236 |
#ifndef SIMULATOR |
237 |
reg = (BYTE *) ALV_HBSRAM; |
238 |
data = (*reg); |
239 |
data &= 0x000000FF; |
240 |
#endif |
241 |
return (data); |
242 |
} |
243 |
|
244 |
/*****************************************************************************/ |
245 |
/* @Function: SD_opSetEventTimeout */ |
246 |
/* @Purpose : */ |
247 |
/* Provided Interface to set the event timeout generation counter. The LSB */ |
248 |
/* has a resolution of 65us. */ |
249 |
/* SRAM address. */ |
250 |
/* */ |
251 |
/* @@ */ |
252 |
/* @Parameter Name @Mode @Description */ |
253 |
/* tics IN counter value */ |
254 |
/* @@ */ |
255 |
/*****************************************************************************/ |
256 |
|
257 |
void SD_opSetEventTimeout(UINT32 tics) |
258 |
{ |
259 |
#ifndef SIMULATOR |
260 |
BYTE *reg; |
261 |
|
262 |
reg = (BYTE *) ALV_ETO1; |
263 |
*reg = (BYTE)(tics & 0x000000FF); |
264 |
reg = (BYTE *) ALV_ETO2; |
265 |
*reg = (BYTE)((tics>>8) & 0x000000FF); |
266 |
#endif |
267 |
} |
268 |
|
269 |
/*****************************************************************************/ |
270 |
/* @Function: SD_opSetDataTimeout */ |
271 |
/* @Purpose : */ |
272 |
/* Provided Interface to set the data timeout generation counter. The LSB */ |
273 |
/* has a resolution of 508ns. */ |
274 |
/* SRAM address. */ |
275 |
/* */ |
276 |
/* @@ */ |
277 |
/* @Parameter Name @Mode @Description */ |
278 |
/* tics IN counter value */ |
279 |
/* @@ */ |
280 |
/*****************************************************************************/ |
281 |
|
282 |
void SD_opSetDataTimeout(UINT32 tics) |
283 |
{ |
284 |
#ifndef SIMULATOR |
285 |
BYTE *reg; |
286 |
|
287 |
reg = (BYTE *) ALV_DTO1; |
288 |
*reg = (BYTE)(tics & 0x00FF); |
289 |
reg = (BYTE *) ALV_DTO2; |
290 |
*reg = (BYTE)((tics>>8) & 0x00FF); |
291 |
#endif |
292 |
} |
293 |
|
294 |
/*****************************************************************************/ |
295 |
/* @Function: SD_opTrigDataEvent */ |
296 |
/* @Purpose : */ |
297 |
/* Provided Interface that trigs the DAQ I/F to recieve incoming */ |
298 |
/* data packet, enabling the DTO, ETO timeouts and PAGE OVERRUN detection */ |
299 |
/* at each 16 Kbytes pages. */ |
300 |
/* */ |
301 |
/* @@ */ |
302 |
/* @Parameter Name @Mode @Description */ |
303 |
/* @@ */ |
304 |
/*****************************************************************************/ |
305 |
|
306 |
void SD_opTrigDataEvent(void) |
307 |
{ |
308 |
#ifndef SIMULATOR |
309 |
BYTE *reg; |
310 |
reg = (BYTE *) ALV_TRIG; |
311 |
*reg = DUMMYWRITE; |
312 |
#endif |
313 |
} |
314 |
|
315 |
/*****************************************************************************/ |
316 |
/* @Function: SD_opTrigData64Event */ |
317 |
/* @Purpose : */ |
318 |
/* Provided Interface that trigs the DAQ I/F to recieve incoming */ |
319 |
/* data packet, enabling the DTO, ETO timeouts and PAGE OVERRUN detection */ |
320 |
/* at each 64 Kbytes pages. */ |
321 |
/* */ |
322 |
/* @@ */ |
323 |
/* @Parameter Name @Mode @Description */ |
324 |
/* @@ */ |
325 |
/*****************************************************************************/ |
326 |
|
327 |
void SD_opTrigData64Event(void) |
328 |
{ |
329 |
#ifndef SIMULATOR |
330 |
BYTE *reg; |
331 |
reg = (BYTE *) ALV_TRIG3; |
332 |
*reg = DUMMYWRITE; |
333 |
#endif |
334 |
} |
335 |
|
336 |
|
337 |
/*****************************************************************************/ |
338 |
/* @Function: SD_opTrigCalibrationEvent */ |
339 |
/* @Purpose : */ |
340 |
/* Provided Interface that trigs the DAQ I/F to recieve incoming data */ |
341 |
/* enabling the DTO and ETO timeouts (for calibration mode) */ |
342 |
/* and PAGE OVERRUN detection at 128 Kbyte */ |
343 |
/* */ |
344 |
/* @@ */ |
345 |
/* @Parameter Name @Mode @Description */ |
346 |
/* @@ */ |
347 |
/*****************************************************************************/ |
348 |
|
349 |
void SD_opTrigCalibrationEvent(void) |
350 |
{ |
351 |
#ifndef SIMULATOR |
352 |
BYTE *reg; |
353 |
reg = (BYTE *) ALV_TRIG2; |
354 |
*reg = DUMMYWRITE; |
355 |
#endif |
356 |
} |
357 |
|
358 |
/*****************************************************************************/ |
359 |
/* @Function: SD_opSetDataHeaderLength */ |
360 |
/* @Purpose : */ |
361 |
/* Provided Interface to set the length of the header of incoming data */ |
362 |
/* packets. */ |
363 |
/* */ |
364 |
/* @@ */ |
365 |
/* @Parameter Name @Mode @Description */ |
366 |
/* length IN header length */ |
367 |
/* @@ */ |
368 |
/*****************************************************************************/ |
369 |
|
370 |
void SD_opSetDataHeaderLength(UINT32 length) |
371 |
{ |
372 |
#ifndef SIMULATOR |
373 |
BYTE *reg; |
374 |
reg = (BYTE *) ALV_DHD; |
375 |
*reg = (BYTE)(length & 0x000000FF); |
376 |
#endif |
377 |
} |
378 |
|
379 |
|
380 |
/*****************************************************************************/ |
381 |
/* @Function: SD_opSetCalibrationHeaderLength */ |
382 |
/* @Purpose : */ |
383 |
/* Provided Interface to set the length of the header of incoming */ |
384 |
/* calibration packets. */ |
385 |
/* */ |
386 |
/* @@ */ |
387 |
/* @Parameter Name @Mode @Description */ |
388 |
/* length IN header length */ |
389 |
/* @@ */ |
390 |
/*****************************************************************************/ |
391 |
|
392 |
void SD_opSetCalibrationHeaderLength(UINT32 length) |
393 |
{ |
394 |
#ifndef SIMULATOR |
395 |
BYTE *reg; |
396 |
reg = (BYTE *) ALV_CHD; |
397 |
*reg = (BYTE)(length & 0x000000FF); |
398 |
#endif |
399 |
} |
400 |
|
401 |
/*****************************************************************************/ |
402 |
/* @Function: SD_opIsCMDReadOk */ |
403 |
/* @Purpose : */ |
404 |
/* Provided Interface to retrive the status of the last SRAM to CMD write */ |
405 |
/* */ |
406 |
/* @@ */ |
407 |
/* @Parameter Name @Mode @Description */ |
408 |
/* TRANSFERSTAT OUT Last SRAM Page store into MMSU result */ |
409 |
/* @@ */ |
410 |
/*****************************************************************************/ |
411 |
|
412 |
SD_TRANSFERSTAT SD_opIsCMDReadOk(void) |
413 |
{ |
414 |
#ifndef SIMULATOR |
415 |
BYTE *reg; |
416 |
reg = (BYTE *) ALV_CMDEA3; |
417 |
return (*reg & 0x80) ? SD_TRANSFEROK : SD_TRANSFERFAIL; |
418 |
#else |
419 |
return SD_TRANSFEROK; |
420 |
#endif |
421 |
} |
422 |
|
423 |
/*****************************************************************************/ |
424 |
/* @Function: SD_opSetSRAMRWAddress */ |
425 |
/* @Purpose : */ |
426 |
/* Provided Interface to set the address for I/O operation between SRAM and */ |
427 |
/* processor. */ |
428 |
/* */ |
429 |
/* @@ */ |
430 |
/* @Parameter Name @Mode @Description */ |
431 |
/* address IN read/write address */ |
432 |
/* @@ */ |
433 |
/*****************************************************************************/ |
434 |
|
435 |
void SD_opSetSRAMRWAddress(UINT32 address) |
436 |
{ |
437 |
#ifndef SIMULATOR |
438 |
BYTE *reg; |
439 |
|
440 |
reg = (BYTE *) ALV_HBP1; |
441 |
*reg = (BYTE)(address & 0x000000FF); |
442 |
reg = (BYTE *) ALV_HBP2; |
443 |
*reg = (BYTE)((address>>8) & 0x000000FF); |
444 |
reg = (BYTE *) ALV_HBP3; |
445 |
*reg = (BYTE)((address>>14) & 0x000000FF); |
446 |
#endif |
447 |
} |
448 |
|
449 |
/*****************************************************************************/ |
450 |
/* @Function: SD_opGetSRAMRWAddress */ |
451 |
/* @Purpose : */ |
452 |
/* Provided Interface to get the address for I/O operation between SRAM and */ |
453 |
/* processor. */ |
454 |
/* */ |
455 |
/* @@ */ |
456 |
/* @Parameter Name @Mode @Description */ |
457 |
/* address IN read/write address */ |
458 |
/* SD_EXITCODE OUT Exit code */ |
459 |
/* @@ */ |
460 |
/*****************************************************************************/ |
461 |
|
462 |
UINT32 SD_opGetSRAMRWAddress(void) |
463 |
{ |
464 |
|
465 |
UINT32 address = 0x00000000; |
466 |
#ifndef SIMULATOR |
467 |
BYTE *reg; |
468 |
|
469 |
reg = (BYTE *) ALV_HBP3; |
470 |
address = ( (((UINT32)*reg)<<14) & 0x0003C000 ); |
471 |
reg = (BYTE *) ALV_HBP2; |
472 |
address |= ( (((UINT32)*reg)<<8) & 0x00003F00 ); |
473 |
reg = (BYTE *) ALV_HBP1; |
474 |
address |= ( ((UINT32)*reg) & 0x000000FF ); |
475 |
#endif |
476 |
return (address); |
477 |
} |
478 |
|
479 |
/*****************************************************************************/ |
480 |
/* @Function: SD_opSetWPBUSReadPage */ |
481 |
/* @Purpose : */ |
482 |
/* Provided Interface to select the SRAM page be tranfered from MMSU */ |
483 |
/* */ |
484 |
/* @@ */ |
485 |
/* @Parameter Name @Mode @Description */ |
486 |
/* Page IN SRAM page to be transfered */ |
487 |
/* @@ */ |
488 |
/*****************************************************************************/ |
489 |
|
490 |
void SD_opSetWPBUSReadPage(UINT32 Page) |
491 |
{ |
492 |
#ifndef SIMULATOR |
493 |
BYTE *reg; |
494 |
reg = (BYTE *) ALV_WPSA; |
495 |
*reg = (BYTE)(Page & 0x000000FF); |
496 |
#endif |
497 |
} |
498 |
|
499 |
/*****************************************************************************/ |
500 |
/* @Function: SD_opSetWPBUSReadParams */ |
501 |
/* @Purpose : */ |
502 |
/* Provided Interface to set the stop address for the SRAM transfer into */ |
503 |
/* the MMSU */ |
504 |
/* */ |
505 |
/* @@ */ |
506 |
/* @Parameter Name @Mode @Description */ |
507 |
/* ReadParams IN structure to hold the stop page end address */ |
508 |
/* @@ */ |
509 |
/*****************************************************************************/ |
510 |
|
511 |
void SD_opSetWPBUSReadParams(SD_DAQ_WRESULT ReadParams) |
512 |
{ |
513 |
#ifndef SIMULATOR |
514 |
BYTE *reg; |
515 |
reg = (BYTE *) ALV_WPEA1; |
516 |
*reg = (BYTE)(ReadParams & 0x000000FF); |
517 |
reg = (BYTE *) ALV_WPEA2; |
518 |
*reg = (BYTE)((ReadParams>>8) & 0x000000FF); |
519 |
reg = (BYTE *) ALV_WPEA3; |
520 |
*reg = (BYTE)((ReadParams>>14) & 0x000000FF); |
521 |
#endif |
522 |
} |
523 |
|
524 |
/*****************************************************************************/ |
525 |
/* @Function: SD_opSetCMDBUSReadPage */ |
526 |
/* @Purpose : */ |
527 |
/* Provided Interface to select the SRAM page be tranfered from CMD */ |
528 |
/* */ |
529 |
/* @@ */ |
530 |
/* @Parameter Name @Mode @Description */ |
531 |
/* Page IN SRAM page to be transfered */ |
532 |
/* @@ */ |
533 |
/*****************************************************************************/ |
534 |
|
535 |
void SD_opSetCMDBUSReadPage(UINT32 Page) |
536 |
{ |
537 |
#ifndef SIMULATOR |
538 |
BYTE *reg; |
539 |
reg = (BYTE *) ALV_CMDSA; |
540 |
*reg = (BYTE)(Page & 0x000000FF); |
541 |
#endif |
542 |
} |
543 |
|
544 |
/*****************************************************************************/ |
545 |
/* @Function: SD_opSetCMDBUSReadParams */ |
546 |
/* @Purpose : */ |
547 |
/* Provided Interface to set the stop address for the SRAM transfer into */ |
548 |
/* the CMD. */ |
549 |
/* */ |
550 |
/* @@ */ |
551 |
/* @Parameter Name @Mode @Description */ |
552 |
/* ReadParams IN structure to hold the stop page end address */ |
553 |
/* @@ */ |
554 |
/*****************************************************************************/ |
555 |
|
556 |
void SD_opSetCMDBUSReadParams(SD_DAQ_WRESULT ReadParams) |
557 |
{ |
558 |
#ifndef SIMULATOR |
559 |
BYTE *reg; |
560 |
|
561 |
reg = (BYTE *) ALV_CMDEA1; |
562 |
*reg = (BYTE)(ReadParams & 0x000000FF); |
563 |
reg = (BYTE *) ALV_CMDEA2; |
564 |
*reg = (BYTE)((ReadParams>>8) & 0x000000FF); |
565 |
reg = (BYTE *) ALV_CMDEA3; |
566 |
*reg = (BYTE)((ReadParams>>14) & 0x000000FF); |
567 |
#endif |
568 |
} |
569 |
|
570 |
/*****************************************************************************/ |
571 |
/* @Function: SD_opMaskInt */ |
572 |
/* @Purpose : */ |
573 |
/* Provided Interface to mask the Interrupts of the SRAM module */ |
574 |
/* */ |
575 |
/* @@ */ |
576 |
/* @Parameter Name @Mode @Description */ |
577 |
/* IntLine IN Interrupts to mask */ |
578 |
/* @@ */ |
579 |
/*****************************************************************************/ |
580 |
|
581 |
void SD_opMaskInt(SD_INTLINE IntLine) |
582 |
{ |
583 |
#ifndef SIMULATOR |
584 |
BYTE mask; |
585 |
BYTE *reg; |
586 |
|
587 |
reg = (BYTE *) ALV_MSK; |
588 |
mask = *reg; |
589 |
mask |= IntLine; |
590 |
*reg = mask; |
591 |
#endif |
592 |
} |
593 |
|
594 |
/*****************************************************************************/ |
595 |
/* @Function: SD_opUnMaskInt */ |
596 |
/* @Purpose : */ |
597 |
/* Provided Interface to set the Interrupt Mask of the SRAM module */ |
598 |
/* */ |
599 |
/* @@ */ |
600 |
/* @Parameter Name @Mode @Description */ |
601 |
/* IntLine IN Interrupts to unmask */ |
602 |
/* @@ */ |
603 |
/*****************************************************************************/ |
604 |
|
605 |
void SD_opUnMaskInt(SD_INTLINE IntLine) |
606 |
{ |
607 |
#ifndef SIMULATOR |
608 |
BYTE mask; |
609 |
BYTE *reg; |
610 |
|
611 |
reg = (BYTE *) ALV_MSK; |
612 |
mask = *reg; |
613 |
mask &= (~IntLine); |
614 |
*reg = mask; |
615 |
#endif |
616 |
} |
617 |
|
618 |
/*****************************************************************************/ |
619 |
/* @Function: SD_opIsIntMasked */ |
620 |
/* @Purpose : */ |
621 |
/* Provided Interface to check if an Interrupt of the SRAM module is masked */ |
622 |
/* */ |
623 |
/* @@ */ |
624 |
/* @Parameter Name @Mode @Description */ |
625 |
/* IntLine IN Interrupts to unmask */ |
626 |
/* @@ */ |
627 |
/*****************************************************************************/ |
628 |
|
629 |
BOOL SD_opIsIntMasked(SD_INTLINE IntLine) |
630 |
{ |
631 |
|
632 |
BOOL status = FALSE; |
633 |
#ifndef SIMULATOR |
634 |
BYTE mask; |
635 |
BYTE *reg; |
636 |
|
637 |
reg = (BYTE *) ALV_MSK; |
638 |
mask = *reg; |
639 |
mask &= IntLine; |
640 |
if(mask) status = TRUE; |
641 |
#endif |
642 |
return (status); |
643 |
} |
644 |
|
645 |
/*****************************************************************************/ |
646 |
/* @Function: SD_opClearInt */ |
647 |
/* @Purpose : */ |
648 |
/* Provided Interface to clear the Interrupt pending register of the */ |
649 |
/* SRAM module */ |
650 |
/* */ |
651 |
/* @@ */ |
652 |
/* @Parameter Name @Mode @Description */ |
653 |
/* IntLine IN Interrupt to be cleared */ |
654 |
/* @@ */ |
655 |
/*****************************************************************************/ |
656 |
|
657 |
void SD_opClearInt(SD_INTLINE IntLine) |
658 |
{ |
659 |
#ifndef SIMULATOR |
660 |
BYTE *reg; |
661 |
|
662 |
reg = (BYTE*) ALV_INT; |
663 |
*reg = (BYTE)(~IntLine); |
664 |
#endif |
665 |
} |
666 |
|
667 |
/*****************************************************************************/ |
668 |
/* @Function: SD_opIsIntPending */ |
669 |
/* @Purpose : */ |
670 |
/* Provided Interface to check if an Interrupt of the SRAM module is pending*/ |
671 |
/* */ |
672 |
/* @@ */ |
673 |
/* @Parameter Name @Mode @Description */ |
674 |
/* IntLine IN Interrupt to be checked */ |
675 |
/* BOOL OUT True if the Interrupt is pending */ |
676 |
/* @@ */ |
677 |
/*****************************************************************************/ |
678 |
|
679 |
BOOL SD_opIsIntPending(SD_INTLINE IntLine) |
680 |
{ |
681 |
BOOL isPending = FALSE; |
682 |
#ifndef SIMULATOR |
683 |
BYTE pend; |
684 |
BYTE *reg; |
685 |
|
686 |
reg = (BYTE *) ALV_INT; |
687 |
pend = *reg; |
688 |
if((pend & IntLine) != 0) isPending = TRUE; |
689 |
#endif |
690 |
return (isPending); |
691 |
} |
692 |
|
693 |
|
694 |
/*****************************************************************************/ |
695 |
/* @Function: SD_opPIFReset */ |
696 |
/* @Purpose : */ |
697 |
/* Provided Interface to reset the PIF I/F */ |
698 |
/* */ |
699 |
/* @@ */ |
700 |
/* @Parameter Name @Mode @Description */ |
701 |
/* @@ */ |
702 |
/*****************************************************************************/ |
703 |
|
704 |
void SD_opPIFReset(void) |
705 |
{ |
706 |
#ifndef SIMULATOR |
707 |
BYTE *reg; |
708 |
|
709 |
reg = (BYTE *)ALV_RESET; |
710 |
*reg = 0xAA; |
711 |
#endif |
712 |
} |
713 |
|
714 |
/*****************************************************************************/ |
715 |
/* @Function: SD_opGetCMDCounterLeft */ |
716 |
/* @Purpose : */ |
717 |
/* Provided Interface to get the number of bytes left in CMD I/F queue */ |
718 |
/* */ |
719 |
/* @@ */ |
720 |
/* @Parameter Name @Mode @Description */ |
721 |
/* UINT32 OUT number of byte left in CMD queue */ |
722 |
/* @@ */ |
723 |
/*****************************************************************************/ |
724 |
|
725 |
UINT32 SD_opGetCMDCounterLeft(void) |
726 |
{ |
727 |
UINT32 byteLeft = 0x00000000; |
728 |
#ifndef SIMULATOR |
729 |
BYTE *reg; |
730 |
|
731 |
SD_opLatchCMDCounter(); |
732 |
|
733 |
/* read the counter */ |
734 |
reg = (BYTE *) ALV_QCMD3; |
735 |
byteLeft = ( (((UINT32)*reg) << 14) & 0x0001C000 ); |
736 |
reg = (BYTE *) ALV_QCMD2; |
737 |
byteLeft |= ( (((UINT32)*reg) << 8) & 0x00003F00 ); |
738 |
reg = (BYTE *) ALV_QCMD1; |
739 |
byteLeft |= ( ((UINT32)*reg) & 0x000000FF ); |
740 |
#endif |
741 |
return (byteLeft); |
742 |
} |
743 |
|
744 |
/*****************************************************************************/ |
745 |
/* @Function: SD_opLatchCMDCounter */ |
746 |
/* @Purpose : */ |
747 |
/* Provided Interface to latch the the number of bytes left in CMD I/F queue*/ |
748 |
/* */ |
749 |
/* @@ */ |
750 |
/* @Parameter Name @Mode @Description */ |
751 |
/* @@ */ |
752 |
/*****************************************************************************/ |
753 |
|
754 |
void SD_opLatchCMDCounter(void) |
755 |
{ |
756 |
#ifndef SIMULATOR |
757 |
BYTE *reg; |
758 |
|
759 |
/* this write latch the counter in to the registers */ |
760 |
reg = (BYTE *) ALV_QCMD1; |
761 |
*reg = 0xAA; |
762 |
#endif |
763 |
} |