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kusanagi |
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/**************************************************************************** |
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/* F i l e D a t a |
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/* |
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/* Module : SRAMManager |
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/* C.I. No. : |
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/* $Revision: 1.2 $ |
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/* $Date: 2003/08/07 08:46:55 $ |
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/* Belonging to : |
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/* : |
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/* $RCSfile: SD_SRAMDriver_op.c,v $ |
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/* Program Type : |
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/* Sub-modules : |
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/* |
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/**************************************************************************** |
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/* S W D e v e l o p m e n t E n v i r o n m e n t |
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/* |
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/* Host system : |
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/* SW Compiler : |
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/* $Author: wizard $ |
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/* : |
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/**************************************************************************** |
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/* U p d a t i n g |
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/* |
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/* $Log: SD_SRAMDriver_op.c,v $ |
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/* Revision 1.2 2003/08/07 08:46:55 wizard |
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/* SIMULATOR bugfix ifdef/ifndef |
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/* SM_PktSize update bug fix in SM_op_PageHasData in order to fix the laben bug of SM_pi_GetPacket |
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/* introduced the notification to a task from the PageHasData |
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/* |
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/* Revision 1.1.1.1 2003/08/04 09:40:21 sebastiani |
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/* Imported sources laben rel. 19.06.2003 integrated with pam2 |
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/* |
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/* Revision 1.11 2003/05/20 12:27:37 aurora |
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/* removed wait loops for EM between two or more reads on PCMCIA |
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/* |
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/* Revision 1.10 2003/05/05 09:00:06 aurora |
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/* correct the header length programming in DAQSetup |
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/* |
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/* Revision 1.9 2003/04/29 13:30:01 aurora |
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/* introduced the new register TRIG3 for manage page overrun every 64Kbyte |
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/* |
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/* Revision 1.8 2003/03/12 10:56:22 aurora |
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/* added the provider for the counter of bytes left on CMD I/F queue |
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/* |
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/* Revision 1.7 2003/01/30 10:15:35 aurora |
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/* introduced ifdef for EM and FM |
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/* |
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/* Revision 1.6 2002/10/17 10:07:14 zulia |
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/* added SD_PIFReset |
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/* |
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/* Revision 1.5 2002/07/31 14:30:10 zulia |
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/* Added driver for indipendent control of CMD I/F from DAQ I/F |
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/* |
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/* Revision 1.4 2002/05/09 08:16:35 zulia |
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/* * acceptance release |
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/* |
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/* |
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/*****************************************************************************/ |
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/*============================= Include File ================================*/ |
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#include <src/SRAMManager/SRAMDriver/SD_SRAMDriver_op.h> |
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/*============================== local define ===============================*/ |
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/*============================== local types ================================*/ |
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/*****************************************************************************/ |
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/*====== S R A M D r i v e r P R O V I D E D I N T E R F A C E ======*/ |
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/*****************************************************************************/ |
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/* @Function: SD_opSRAMDriverInit */ |
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/* @Purpose : */ |
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/* Provided Interface to init the SRAM driver */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* SD_EXITCODE OUT Exit code */ |
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/* @@ */ |
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/*****************************************************************************/ |
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SD_EXITCODE SD_opSRAMDriverInit(void) |
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{ |
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SD_EXITCODE status = SD_SUCCESS; |
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return (status); |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opSetDAQWritePage */ |
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/* @Purpose : */ |
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/* Provided Interface to select the SRAM page to hold new incoming data. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* Page IN SRAM page to be selected in input */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opSetDAQWritePage(UINT32 Page) |
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{ |
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BYTE *reg; |
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#ifndef SIMULATOR |
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reg = (BYTE *) ALV_DPAGE; |
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*reg = (BYTE)(Page & 0x000000FF); |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opIsDAQWriteOk */ |
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/* @Purpose : */ |
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/* Provided Interface to retrive the status uf the last DAQ I/F write into */ |
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/* SRAM. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* SD_TRANSFERSTAT OUT status of the last DAQ I/F SRAM write */ |
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/* @@ */ |
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/*****************************************************************************/ |
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SD_TRANSFERSTAT SD_opIsDAQWriteOk(void) |
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{ |
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BYTE *reg; |
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BYTE trok; |
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#ifndef SIMULATOR |
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reg = (BYTE *) ALV_DQEA3; |
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trok = *reg; |
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trok = (trok & 0x80)? SD_TRANSFEROK : SD_TRANSFERFAIL; |
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return (trok); |
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#else |
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return SD_TRANSFEROK; |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opGetDAQWriteResult */ |
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/* @Purpose : */ |
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/* Provided Interface to retrive the end address of the data written by the */ |
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/* DAQ I/F in the selected SRAM page. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* SD_DAQ_RESULT OUT structure to hold the end address, page and */ |
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/* status of the last DAQ I/F SRAM write */ |
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/* @@ */ |
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/*****************************************************************************/ |
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SD_DAQ_WRESULT SD_opGetDAQWriteResult(void) |
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{ |
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SD_DAQ_WRESULT result = 0x00000000; |
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#ifndef SIMULATOR |
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BYTE data; |
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UINT32 data32; |
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BYTE *reg; |
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reg = (BYTE *) ALV_DQEA3; |
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data = *reg; |
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data = data & 0x0000000f; |
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data32 = ((UINT32)data << 14); |
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result = data32; |
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reg = (BYTE *) ALV_DQEA2; |
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data = *reg; |
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data = data & 0x0000003f; |
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data32 = ((UINT32)data << 8); |
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result |= data32; |
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reg = (BYTE *) ALV_DQEA1; |
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data = *reg; |
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data = data & 0x000000ff; |
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data32 = ((UINT32)data); |
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result |= data32; |
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#endif |
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return (result); |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opStartTransferToCMD */ |
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/* @Purpose : */ |
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/* Provided Interface to start the transfer of data stored in the pervoiusly*/ |
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/* selected SRAM to the CMD I/F. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opStartTransferToCMD(void) |
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{ |
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BYTE *reg; |
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reg = (BYTE *) ALV_CMD; |
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*reg = DUMMYWRITE; |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opWriteSRAM */ |
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/* @Purpose : */ |
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/* Provided Interface to write a data byte in the pervoiusly selected */ |
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/* SRAM address. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* data IN 8bit data to store into perviously selected */ |
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/* SRAM address */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opWriteSRAM(UINT32 data) |
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{ |
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BYTE *reg; |
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#ifndef SIMULATOR |
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reg = (BYTE *) ALV_HBSRAM; |
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*reg = (BYTE)(data & 0x000000FF); |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opReadSRAM */ |
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/* @Purpose : */ |
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/* Provided Interface to read a data byte from the pervoiusly selected */ |
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/* SRAM address. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* BYTE OUT 8bit data read from perviously selected */ |
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/* SRAM address */ |
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/* @@ */ |
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/*****************************************************************************/ |
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UINT32 SD_opReadSRAM(void) |
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{ |
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BYTE *reg; |
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UINT32 data=0; |
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#ifndef SIMULATOR |
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reg = (BYTE *) ALV_HBSRAM; |
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data = (*reg); |
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data &= 0x000000FF; |
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#endif |
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return (data); |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opSetEventTimeout */ |
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/* @Purpose : */ |
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/* Provided Interface to set the event timeout generation counter. The LSB */ |
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/* has a resolution of 65us. */ |
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/* SRAM address. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* tics IN counter value */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opSetEventTimeout(UINT32 tics) |
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{ |
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#ifndef SIMULATOR |
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BYTE *reg; |
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reg = (BYTE *) ALV_ETO1; |
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*reg = (BYTE)(tics & 0x000000FF); |
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reg = (BYTE *) ALV_ETO2; |
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*reg = (BYTE)((tics>>8) & 0x000000FF); |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opSetDataTimeout */ |
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/* @Purpose : */ |
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/* Provided Interface to set the data timeout generation counter. The LSB */ |
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/* has a resolution of 508ns. */ |
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/* SRAM address. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* tics IN counter value */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opSetDataTimeout(UINT32 tics) |
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{ |
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#ifndef SIMULATOR |
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BYTE *reg; |
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reg = (BYTE *) ALV_DTO1; |
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*reg = (BYTE)(tics & 0x00FF); |
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reg = (BYTE *) ALV_DTO2; |
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*reg = (BYTE)((tics>>8) & 0x00FF); |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opTrigDataEvent */ |
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/* @Purpose : */ |
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/* Provided Interface that trigs the DAQ I/F to recieve incoming */ |
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/* data packet, enabling the DTO, ETO timeouts and PAGE OVERRUN detection */ |
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/* at each 16 Kbytes pages. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opTrigDataEvent(void) |
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{ |
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#ifndef SIMULATOR |
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BYTE *reg; |
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reg = (BYTE *) ALV_TRIG; |
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*reg = DUMMYWRITE; |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opTrigData64Event */ |
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/* @Purpose : */ |
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/* Provided Interface that trigs the DAQ I/F to recieve incoming */ |
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/* data packet, enabling the DTO, ETO timeouts and PAGE OVERRUN detection */ |
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/* at each 64 Kbytes pages. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opTrigData64Event(void) |
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{ |
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#ifndef SIMULATOR |
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BYTE *reg; |
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reg = (BYTE *) ALV_TRIG3; |
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*reg = DUMMYWRITE; |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opTrigCalibrationEvent */ |
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/* @Purpose : */ |
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/* Provided Interface that trigs the DAQ I/F to recieve incoming data */ |
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/* enabling the DTO and ETO timeouts (for calibration mode) */ |
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/* and PAGE OVERRUN detection at 128 Kbyte */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opTrigCalibrationEvent(void) |
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{ |
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#ifndef SIMULATOR |
| 352 |
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BYTE *reg; |
| 353 |
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reg = (BYTE *) ALV_TRIG2; |
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*reg = DUMMYWRITE; |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opSetDataHeaderLength */ |
| 360 |
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/* @Purpose : */ |
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/* Provided Interface to set the length of the header of incoming data */ |
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/* packets. */ |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* length IN header length */ |
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/* @@ */ |
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/*****************************************************************************/ |
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void SD_opSetDataHeaderLength(UINT32 length) |
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{ |
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#ifndef SIMULATOR |
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BYTE *reg; |
| 374 |
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reg = (BYTE *) ALV_DHD; |
| 375 |
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*reg = (BYTE)(length & 0x000000FF); |
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#endif |
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} |
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/*****************************************************************************/ |
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/* @Function: SD_opSetCalibrationHeaderLength */ |
| 382 |
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/* @Purpose : */ |
| 383 |
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/* Provided Interface to set the length of the header of incoming */ |
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/* calibration packets. */ |
| 385 |
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/* */ |
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/* @@ */ |
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/* @Parameter Name @Mode @Description */ |
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/* length IN header length */ |
| 389 |
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/* @@ */ |
| 390 |
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/*****************************************************************************/ |
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| 392 |
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void SD_opSetCalibrationHeaderLength(UINT32 length) |
| 393 |
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{ |
| 394 |
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#ifndef SIMULATOR |
| 395 |
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BYTE *reg; |
| 396 |
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reg = (BYTE *) ALV_CHD; |
| 397 |
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*reg = (BYTE)(length & 0x000000FF); |
| 398 |
|
|
#endif |
| 399 |
|
|
} |
| 400 |
|
|
|
| 401 |
|
|
/*****************************************************************************/ |
| 402 |
|
|
/* @Function: SD_opIsCMDReadOk */ |
| 403 |
|
|
/* @Purpose : */ |
| 404 |
|
|
/* Provided Interface to retrive the status of the last SRAM to CMD write */ |
| 405 |
|
|
/* */ |
| 406 |
|
|
/* @@ */ |
| 407 |
|
|
/* @Parameter Name @Mode @Description */ |
| 408 |
|
|
/* TRANSFERSTAT OUT Last SRAM Page store into MMSU result */ |
| 409 |
|
|
/* @@ */ |
| 410 |
|
|
/*****************************************************************************/ |
| 411 |
|
|
|
| 412 |
|
|
SD_TRANSFERSTAT SD_opIsCMDReadOk(void) |
| 413 |
|
|
{ |
| 414 |
|
|
#ifndef SIMULATOR |
| 415 |
|
|
BYTE *reg; |
| 416 |
|
|
reg = (BYTE *) ALV_CMDEA3; |
| 417 |
|
|
return (*reg & 0x80) ? SD_TRANSFEROK : SD_TRANSFERFAIL; |
| 418 |
|
|
#else |
| 419 |
|
|
return SD_TRANSFEROK; |
| 420 |
|
|
#endif |
| 421 |
|
|
} |
| 422 |
|
|
|
| 423 |
|
|
/*****************************************************************************/ |
| 424 |
|
|
/* @Function: SD_opSetSRAMRWAddress */ |
| 425 |
|
|
/* @Purpose : */ |
| 426 |
|
|
/* Provided Interface to set the address for I/O operation between SRAM and */ |
| 427 |
|
|
/* processor. */ |
| 428 |
|
|
/* */ |
| 429 |
|
|
/* @@ */ |
| 430 |
|
|
/* @Parameter Name @Mode @Description */ |
| 431 |
|
|
/* address IN read/write address */ |
| 432 |
|
|
/* @@ */ |
| 433 |
|
|
/*****************************************************************************/ |
| 434 |
|
|
|
| 435 |
|
|
void SD_opSetSRAMRWAddress(UINT32 address) |
| 436 |
|
|
{ |
| 437 |
|
|
#ifndef SIMULATOR |
| 438 |
|
|
BYTE *reg; |
| 439 |
|
|
|
| 440 |
|
|
reg = (BYTE *) ALV_HBP1; |
| 441 |
|
|
*reg = (BYTE)(address & 0x000000FF); |
| 442 |
|
|
reg = (BYTE *) ALV_HBP2; |
| 443 |
|
|
*reg = (BYTE)((address>>8) & 0x000000FF); |
| 444 |
|
|
reg = (BYTE *) ALV_HBP3; |
| 445 |
|
|
*reg = (BYTE)((address>>14) & 0x000000FF); |
| 446 |
|
|
#endif |
| 447 |
|
|
} |
| 448 |
|
|
|
| 449 |
|
|
/*****************************************************************************/ |
| 450 |
|
|
/* @Function: SD_opGetSRAMRWAddress */ |
| 451 |
|
|
/* @Purpose : */ |
| 452 |
|
|
/* Provided Interface to get the address for I/O operation between SRAM and */ |
| 453 |
|
|
/* processor. */ |
| 454 |
|
|
/* */ |
| 455 |
|
|
/* @@ */ |
| 456 |
|
|
/* @Parameter Name @Mode @Description */ |
| 457 |
|
|
/* address IN read/write address */ |
| 458 |
|
|
/* SD_EXITCODE OUT Exit code */ |
| 459 |
|
|
/* @@ */ |
| 460 |
|
|
/*****************************************************************************/ |
| 461 |
|
|
|
| 462 |
|
|
UINT32 SD_opGetSRAMRWAddress(void) |
| 463 |
|
|
{ |
| 464 |
|
|
|
| 465 |
|
|
UINT32 address = 0x00000000; |
| 466 |
|
|
#ifndef SIMULATOR |
| 467 |
|
|
BYTE *reg; |
| 468 |
|
|
|
| 469 |
|
|
reg = (BYTE *) ALV_HBP3; |
| 470 |
|
|
address = ( (((UINT32)*reg)<<14) & 0x0003C000 ); |
| 471 |
|
|
reg = (BYTE *) ALV_HBP2; |
| 472 |
|
|
address |= ( (((UINT32)*reg)<<8) & 0x00003F00 ); |
| 473 |
|
|
reg = (BYTE *) ALV_HBP1; |
| 474 |
|
|
address |= ( ((UINT32)*reg) & 0x000000FF ); |
| 475 |
|
|
#endif |
| 476 |
|
|
return (address); |
| 477 |
|
|
} |
| 478 |
|
|
|
| 479 |
|
|
/*****************************************************************************/ |
| 480 |
|
|
/* @Function: SD_opSetWPBUSReadPage */ |
| 481 |
|
|
/* @Purpose : */ |
| 482 |
|
|
/* Provided Interface to select the SRAM page be tranfered from MMSU */ |
| 483 |
|
|
/* */ |
| 484 |
|
|
/* @@ */ |
| 485 |
|
|
/* @Parameter Name @Mode @Description */ |
| 486 |
|
|
/* Page IN SRAM page to be transfered */ |
| 487 |
|
|
/* @@ */ |
| 488 |
|
|
/*****************************************************************************/ |
| 489 |
|
|
|
| 490 |
|
|
void SD_opSetWPBUSReadPage(UINT32 Page) |
| 491 |
|
|
{ |
| 492 |
|
|
#ifndef SIMULATOR |
| 493 |
|
|
BYTE *reg; |
| 494 |
|
|
reg = (BYTE *) ALV_WPSA; |
| 495 |
|
|
*reg = (BYTE)(Page & 0x000000FF); |
| 496 |
|
|
#endif |
| 497 |
|
|
} |
| 498 |
|
|
|
| 499 |
|
|
/*****************************************************************************/ |
| 500 |
|
|
/* @Function: SD_opSetWPBUSReadParams */ |
| 501 |
|
|
/* @Purpose : */ |
| 502 |
|
|
/* Provided Interface to set the stop address for the SRAM transfer into */ |
| 503 |
|
|
/* the MMSU */ |
| 504 |
|
|
/* */ |
| 505 |
|
|
/* @@ */ |
| 506 |
|
|
/* @Parameter Name @Mode @Description */ |
| 507 |
|
|
/* ReadParams IN structure to hold the stop page end address */ |
| 508 |
|
|
/* @@ */ |
| 509 |
|
|
/*****************************************************************************/ |
| 510 |
|
|
|
| 511 |
|
|
void SD_opSetWPBUSReadParams(SD_DAQ_WRESULT ReadParams) |
| 512 |
|
|
{ |
| 513 |
|
|
#ifndef SIMULATOR |
| 514 |
|
|
BYTE *reg; |
| 515 |
|
|
reg = (BYTE *) ALV_WPEA1; |
| 516 |
|
|
*reg = (BYTE)(ReadParams & 0x000000FF); |
| 517 |
|
|
reg = (BYTE *) ALV_WPEA2; |
| 518 |
|
|
*reg = (BYTE)((ReadParams>>8) & 0x000000FF); |
| 519 |
|
|
reg = (BYTE *) ALV_WPEA3; |
| 520 |
|
|
*reg = (BYTE)((ReadParams>>14) & 0x000000FF); |
| 521 |
|
|
#endif |
| 522 |
|
|
} |
| 523 |
|
|
|
| 524 |
|
|
/*****************************************************************************/ |
| 525 |
|
|
/* @Function: SD_opSetCMDBUSReadPage */ |
| 526 |
|
|
/* @Purpose : */ |
| 527 |
|
|
/* Provided Interface to select the SRAM page be tranfered from CMD */ |
| 528 |
|
|
/* */ |
| 529 |
|
|
/* @@ */ |
| 530 |
|
|
/* @Parameter Name @Mode @Description */ |
| 531 |
|
|
/* Page IN SRAM page to be transfered */ |
| 532 |
|
|
/* @@ */ |
| 533 |
|
|
/*****************************************************************************/ |
| 534 |
|
|
|
| 535 |
|
|
void SD_opSetCMDBUSReadPage(UINT32 Page) |
| 536 |
|
|
{ |
| 537 |
|
|
#ifndef SIMULATOR |
| 538 |
|
|
BYTE *reg; |
| 539 |
|
|
reg = (BYTE *) ALV_CMDSA; |
| 540 |
|
|
*reg = (BYTE)(Page & 0x000000FF); |
| 541 |
|
|
#endif |
| 542 |
|
|
} |
| 543 |
|
|
|
| 544 |
|
|
/*****************************************************************************/ |
| 545 |
|
|
/* @Function: SD_opSetCMDBUSReadParams */ |
| 546 |
|
|
/* @Purpose : */ |
| 547 |
|
|
/* Provided Interface to set the stop address for the SRAM transfer into */ |
| 548 |
|
|
/* the CMD. */ |
| 549 |
|
|
/* */ |
| 550 |
|
|
/* @@ */ |
| 551 |
|
|
/* @Parameter Name @Mode @Description */ |
| 552 |
|
|
/* ReadParams IN structure to hold the stop page end address */ |
| 553 |
|
|
/* @@ */ |
| 554 |
|
|
/*****************************************************************************/ |
| 555 |
|
|
|
| 556 |
|
|
void SD_opSetCMDBUSReadParams(SD_DAQ_WRESULT ReadParams) |
| 557 |
|
|
{ |
| 558 |
|
|
#ifndef SIMULATOR |
| 559 |
|
|
BYTE *reg; |
| 560 |
|
|
|
| 561 |
|
|
reg = (BYTE *) ALV_CMDEA1; |
| 562 |
|
|
*reg = (BYTE)(ReadParams & 0x000000FF); |
| 563 |
|
|
reg = (BYTE *) ALV_CMDEA2; |
| 564 |
|
|
*reg = (BYTE)((ReadParams>>8) & 0x000000FF); |
| 565 |
|
|
reg = (BYTE *) ALV_CMDEA3; |
| 566 |
|
|
*reg = (BYTE)((ReadParams>>14) & 0x000000FF); |
| 567 |
|
|
#endif |
| 568 |
|
|
} |
| 569 |
|
|
|
| 570 |
|
|
/*****************************************************************************/ |
| 571 |
|
|
/* @Function: SD_opMaskInt */ |
| 572 |
|
|
/* @Purpose : */ |
| 573 |
|
|
/* Provided Interface to mask the Interrupts of the SRAM module */ |
| 574 |
|
|
/* */ |
| 575 |
|
|
/* @@ */ |
| 576 |
|
|
/* @Parameter Name @Mode @Description */ |
| 577 |
|
|
/* IntLine IN Interrupts to mask */ |
| 578 |
|
|
/* @@ */ |
| 579 |
|
|
/*****************************************************************************/ |
| 580 |
|
|
|
| 581 |
|
|
void SD_opMaskInt(SD_INTLINE IntLine) |
| 582 |
|
|
{ |
| 583 |
|
|
#ifndef SIMULATOR |
| 584 |
|
|
BYTE mask; |
| 585 |
|
|
BYTE *reg; |
| 586 |
|
|
|
| 587 |
|
|
reg = (BYTE *) ALV_MSK; |
| 588 |
|
|
mask = *reg; |
| 589 |
|
|
mask |= IntLine; |
| 590 |
|
|
*reg = mask; |
| 591 |
|
|
#endif |
| 592 |
|
|
} |
| 593 |
|
|
|
| 594 |
|
|
/*****************************************************************************/ |
| 595 |
|
|
/* @Function: SD_opUnMaskInt */ |
| 596 |
|
|
/* @Purpose : */ |
| 597 |
|
|
/* Provided Interface to set the Interrupt Mask of the SRAM module */ |
| 598 |
|
|
/* */ |
| 599 |
|
|
/* @@ */ |
| 600 |
|
|
/* @Parameter Name @Mode @Description */ |
| 601 |
|
|
/* IntLine IN Interrupts to unmask */ |
| 602 |
|
|
/* @@ */ |
| 603 |
|
|
/*****************************************************************************/ |
| 604 |
|
|
|
| 605 |
|
|
void SD_opUnMaskInt(SD_INTLINE IntLine) |
| 606 |
|
|
{ |
| 607 |
|
|
#ifndef SIMULATOR |
| 608 |
|
|
BYTE mask; |
| 609 |
|
|
BYTE *reg; |
| 610 |
|
|
|
| 611 |
|
|
reg = (BYTE *) ALV_MSK; |
| 612 |
|
|
mask = *reg; |
| 613 |
|
|
mask &= (~IntLine); |
| 614 |
|
|
*reg = mask; |
| 615 |
|
|
#endif |
| 616 |
|
|
} |
| 617 |
|
|
|
| 618 |
|
|
/*****************************************************************************/ |
| 619 |
|
|
/* @Function: SD_opIsIntMasked */ |
| 620 |
|
|
/* @Purpose : */ |
| 621 |
|
|
/* Provided Interface to check if an Interrupt of the SRAM module is masked */ |
| 622 |
|
|
/* */ |
| 623 |
|
|
/* @@ */ |
| 624 |
|
|
/* @Parameter Name @Mode @Description */ |
| 625 |
|
|
/* IntLine IN Interrupts to unmask */ |
| 626 |
|
|
/* @@ */ |
| 627 |
|
|
/*****************************************************************************/ |
| 628 |
|
|
|
| 629 |
|
|
BOOL SD_opIsIntMasked(SD_INTLINE IntLine) |
| 630 |
|
|
{ |
| 631 |
|
|
|
| 632 |
|
|
BOOL status = FALSE; |
| 633 |
|
|
#ifndef SIMULATOR |
| 634 |
|
|
BYTE mask; |
| 635 |
|
|
BYTE *reg; |
| 636 |
|
|
|
| 637 |
|
|
reg = (BYTE *) ALV_MSK; |
| 638 |
|
|
mask = *reg; |
| 639 |
|
|
mask &= IntLine; |
| 640 |
|
|
if(mask) status = TRUE; |
| 641 |
|
|
#endif |
| 642 |
|
|
return (status); |
| 643 |
|
|
} |
| 644 |
|
|
|
| 645 |
|
|
/*****************************************************************************/ |
| 646 |
|
|
/* @Function: SD_opClearInt */ |
| 647 |
|
|
/* @Purpose : */ |
| 648 |
|
|
/* Provided Interface to clear the Interrupt pending register of the */ |
| 649 |
|
|
/* SRAM module */ |
| 650 |
|
|
/* */ |
| 651 |
|
|
/* @@ */ |
| 652 |
|
|
/* @Parameter Name @Mode @Description */ |
| 653 |
|
|
/* IntLine IN Interrupt to be cleared */ |
| 654 |
|
|
/* @@ */ |
| 655 |
|
|
/*****************************************************************************/ |
| 656 |
|
|
|
| 657 |
|
|
void SD_opClearInt(SD_INTLINE IntLine) |
| 658 |
|
|
{ |
| 659 |
|
|
#ifndef SIMULATOR |
| 660 |
|
|
BYTE *reg; |
| 661 |
|
|
|
| 662 |
|
|
reg = (BYTE*) ALV_INT; |
| 663 |
|
|
*reg = (BYTE)(~IntLine); |
| 664 |
|
|
#endif |
| 665 |
|
|
} |
| 666 |
|
|
|
| 667 |
|
|
/*****************************************************************************/ |
| 668 |
|
|
/* @Function: SD_opIsIntPending */ |
| 669 |
|
|
/* @Purpose : */ |
| 670 |
|
|
/* Provided Interface to check if an Interrupt of the SRAM module is pending*/ |
| 671 |
|
|
/* */ |
| 672 |
|
|
/* @@ */ |
| 673 |
|
|
/* @Parameter Name @Mode @Description */ |
| 674 |
|
|
/* IntLine IN Interrupt to be checked */ |
| 675 |
|
|
/* BOOL OUT True if the Interrupt is pending */ |
| 676 |
|
|
/* @@ */ |
| 677 |
|
|
/*****************************************************************************/ |
| 678 |
|
|
|
| 679 |
|
|
BOOL SD_opIsIntPending(SD_INTLINE IntLine) |
| 680 |
|
|
{ |
| 681 |
|
|
BOOL isPending = FALSE; |
| 682 |
|
|
#ifndef SIMULATOR |
| 683 |
|
|
BYTE pend; |
| 684 |
|
|
BYTE *reg; |
| 685 |
|
|
|
| 686 |
|
|
reg = (BYTE *) ALV_INT; |
| 687 |
|
|
pend = *reg; |
| 688 |
|
|
if((pend & IntLine) != 0) isPending = TRUE; |
| 689 |
|
|
#endif |
| 690 |
|
|
return (isPending); |
| 691 |
|
|
} |
| 692 |
|
|
|
| 693 |
|
|
|
| 694 |
|
|
/*****************************************************************************/ |
| 695 |
|
|
/* @Function: SD_opPIFReset */ |
| 696 |
|
|
/* @Purpose : */ |
| 697 |
|
|
/* Provided Interface to reset the PIF I/F */ |
| 698 |
|
|
/* */ |
| 699 |
|
|
/* @@ */ |
| 700 |
|
|
/* @Parameter Name @Mode @Description */ |
| 701 |
|
|
/* @@ */ |
| 702 |
|
|
/*****************************************************************************/ |
| 703 |
|
|
|
| 704 |
|
|
void SD_opPIFReset(void) |
| 705 |
|
|
{ |
| 706 |
|
|
#ifndef SIMULATOR |
| 707 |
|
|
BYTE *reg; |
| 708 |
|
|
|
| 709 |
|
|
reg = (BYTE *)ALV_RESET; |
| 710 |
|
|
*reg = 0xAA; |
| 711 |
|
|
#endif |
| 712 |
|
|
} |
| 713 |
|
|
|
| 714 |
|
|
/*****************************************************************************/ |
| 715 |
|
|
/* @Function: SD_opGetCMDCounterLeft */ |
| 716 |
|
|
/* @Purpose : */ |
| 717 |
|
|
/* Provided Interface to get the number of bytes left in CMD I/F queue */ |
| 718 |
|
|
/* */ |
| 719 |
|
|
/* @@ */ |
| 720 |
|
|
/* @Parameter Name @Mode @Description */ |
| 721 |
|
|
/* UINT32 OUT number of byte left in CMD queue */ |
| 722 |
|
|
/* @@ */ |
| 723 |
|
|
/*****************************************************************************/ |
| 724 |
|
|
|
| 725 |
|
|
UINT32 SD_opGetCMDCounterLeft(void) |
| 726 |
|
|
{ |
| 727 |
|
|
UINT32 byteLeft = 0x00000000; |
| 728 |
|
|
#ifndef SIMULATOR |
| 729 |
|
|
BYTE *reg; |
| 730 |
|
|
|
| 731 |
|
|
SD_opLatchCMDCounter(); |
| 732 |
|
|
|
| 733 |
|
|
/* read the counter */ |
| 734 |
|
|
reg = (BYTE *) ALV_QCMD3; |
| 735 |
|
|
byteLeft = ( (((UINT32)*reg) << 14) & 0x0001C000 ); |
| 736 |
|
|
reg = (BYTE *) ALV_QCMD2; |
| 737 |
|
|
byteLeft |= ( (((UINT32)*reg) << 8) & 0x00003F00 ); |
| 738 |
|
|
reg = (BYTE *) ALV_QCMD1; |
| 739 |
|
|
byteLeft |= ( ((UINT32)*reg) & 0x000000FF ); |
| 740 |
|
|
#endif |
| 741 |
|
|
return (byteLeft); |
| 742 |
|
|
} |
| 743 |
|
|
|
| 744 |
|
|
/*****************************************************************************/ |
| 745 |
|
|
/* @Function: SD_opLatchCMDCounter */ |
| 746 |
|
|
/* @Purpose : */ |
| 747 |
|
|
/* Provided Interface to latch the the number of bytes left in CMD I/F queue*/ |
| 748 |
|
|
/* */ |
| 749 |
|
|
/* @@ */ |
| 750 |
|
|
/* @Parameter Name @Mode @Description */ |
| 751 |
|
|
/* @@ */ |
| 752 |
|
|
/*****************************************************************************/ |
| 753 |
|
|
|
| 754 |
|
|
void SD_opLatchCMDCounter(void) |
| 755 |
|
|
{ |
| 756 |
|
|
#ifndef SIMULATOR |
| 757 |
|
|
BYTE *reg; |
| 758 |
|
|
|
| 759 |
|
|
/* this write latch the counter in to the registers */ |
| 760 |
|
|
reg = (BYTE *) ALV_QCMD1; |
| 761 |
|
|
*reg = 0xAA; |
| 762 |
|
|
#endif |
| 763 |
|
|
} |
Parent Directory
| 
Revision Log