/[PAMELA software]/quicklook/dataToXML/Data/compilationInfo/src/INFN/PWR_PowerHandler_INFN.c
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Annotation of /quicklook/dataToXML/Data/compilationInfo/src/INFN/PWR_PowerHandler_INFN.c

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Revision 1.1.1.1 - (hide annotations) (download) (vendor branch)
Tue Apr 25 09:00:20 2006 UTC (19 years, 2 months ago) by kusanagi
Branch: MAIN
CVS Tags: dataToXML1_02/01, dataToXML1_02/00, dataToXML1_03/00, dataToXML1_03/01, dataToXML1_00/00, firstRelease, dataToXML1_01/00, dataToXML1_03_02, HEAD
Changes since 1.1: +0 -0 lines
File MIME type: text/plain
These program extract in an XML format the info contained into the ROOT files generated by YODA from the PAMELA data. To visualize the XML files in a more human readable format a collection of XSL files are given in the Data subfolder.

1 kusanagi 1.1 /****************************************************************************
2     * F i l e D a t a
3     * $Id: PWR_PowerHandler_INFN.c,v 1.52 2005/03/23 10:21:42 sebastiani Exp $
4     * $Revision: 1.52 $
5     * $Date: 2005/03/23 10:21:42 $
6     * $RCSfile: PWR_PowerHandler_INFN.c,v $
7     *
8     ****************************************************************************
9     * S W D e v e l o p m e n t E n v i r o n m e n t
10     *
11     * $Author: sebastiani $
12     * :
13     ****************************************************************************
14     * U p d a t i n g
15    
16     * $Log: PWR_PowerHandler_INFN.c,v $
17     * Revision 1.52 2005/03/23 10:21:42 sebastiani
18     * PWR_HVSetting always return successful; PWR_PSBforTOFSetting introduced
19     *
20     * Revision 1.51 2005/03/20 18:24:07 sebastiani
21     * OS_piTaskSuspend(PRH_VAR_PWR_CMD2PSB_DELAY) introduced at starto of PSB commands
22     *
23     * Revision 1.50 2005/03/06 14:54:46 sebastiani
24     * version running on 06 03 2005
25     *
26     * Revision 1.49 2005/02/24 17:47:11 sebastiani
27     * (1) more logging comments (2) IF_CMD2TOFHV PWR_output_values_ipm updated at end of PWR_CheckIPM_Voltage (3) PWR_IF_CMD2PSB accepts 2 params (4) IF_CMD2PSB is now a funciont, not a macro and accepts 2 params (5) PWR_IF_CALO_FE introduced as a wrapper of IF_CMD2PSB (6) OS_piTaskSuspend(500) introduced in CUSTOM mode between PWR_SendTC(TM_PS_RESET) and PWR_PSBSetting()
28     *
29     * Revision 1.48 2005/02/21 08:58:29 sebastiani
30     * all log comments completed
31     *
32     * Revision 1.47 2005/01/26 18:46:48 sebastiani
33     * new bug fixes for WS
34     *
35     * Revision 1.46 2005/01/10 14:54:16 faber
36     * bugfix des force
37     *
38     * Revision 1.44 2004/12/23 13:54:34 faber
39     * PWR_HVSetting() introduced
40     *
41     * Revision 1.43 2004/12/20 14:02:04 faber
42     * @LOG entry introduced in all ALM_WriteLog occurrences
43     *
44     * Revision 1.42 2004/12/15 09:25:19 sebastiani
45     * PWR_TRB_On introduced, TRBSetting accept a mask parameter and called 3 times,
46     * and many other patches
47     *
48     * Revision 1.41 2004/12/03 10:08:11 faber
49     * PWR_TRB_MOSFET_MASK introduced
50     * and IF_CMD2PSB(PRH_VAR_PSB_TRB_S9004_34_ON)
51     * into TRB Settings procedure
52     *
53     * Revision 1.40 2004/11/25 09:20:17 sebastiani
54     * *** empty log message ***
55     *
56     * Revision 1.39 2004/11/23 22:54:06 sebastiani
57     * *** empty log message ***
58     *
59     * Revision 1.38 2004/11/23 15:53:26 sebastiani
60     * *** empty log message ***
61     *
62     * Revision 1.37 2004/11/23 15:16:51 faber
63     * *** empty log message ***
64     *
65     * Revision 1.36 2004/11/23 12:24:57 sebastiani
66     * fixed dcdcon procedure
67     *
68     * Revision 1.35 2004/11/19 15:14:52 sebastiani
69     * PRH_EXTERN_{VAR,ARR,TABLE} removed and put them on the autogenerated parameter heeader file
70     *
71     * Revision 1.34 2004/11/18 16:02:34 sebastiani
72     * GAS/TRD removed
73     *
74     * Revision 1.33 2004/11/16 18:22:18 sebastiani
75     * change power on off precedure on dcdc
76     * fix psb commands
77     * ecc.ecc.
78     *
79     * Revision 1.32 2004/11/05 09:36:35 sebastiani
80     * first version of the PM state machine. tried but not deeply tested
81     *
82     * Revision 1.31 2004/11/02 15:41:39 faber
83     * *** empty log message ***
84     *
85     * Revision 1.30 2004/10/22 16:05:06 sebastiani
86     * *** empty log message ***
87     *
88     * Revision 1.29 2004/10/19 16:59:27 sebastiani
89     * first text for IPM/ciclyc
90     *
91     * Revision 1.28 2004/10/18 14:11:37 faber
92     * *** empty log message ***
93     *
94     * Revision 1.27 2004/10/18 10:43:02 faber
95     * Power check new fligh mode
96     *
97     * Revision 1.26 2004/10/08 15:57:51 sebastiani
98     * fix power hot cold variables settings.
99     * fix ws
100     * added function to set khb hot or cold
101     *
102     * Revision 1.25 2004/09/17 15:01:00 faber
103     * LU_INFN_LOG flags fixing
104     *
105     * Revision 1.24 2004/09/14 14:47:05 sebastiani
106     * PSB reply one word everytime
107     *
108     * Revision 1.23 2004/09/14 13:05:37 alfarano
109     * update TM constants and definitions
110     *
111     * Revision 1.22 2004/09/13 16:07:46 alfarano
112     * *** empty log message ***
113     *
114     * Revision 1.21 2004/09/10 15:27:28 sebastiani
115     * added PWR dcdc procedures
116     *
117     * Revision 1.20 2004/08/02 15:49:47 alfarano
118     * alarm handling , scm & pm communication rewrite
119     *
120     * Revision 1.19 2004/07/13 14:35:54 alfarano
121     * *** empty log message ***
122     *
123     * Revision 1.18 2004/07/12 09:19:33 sebastiani
124     * some fixing about alamrs
125     *
126     * Revision 1.17 2004/04/26 10:56:04 faber
127     * imported diffs from TM branch (PWR_ module)
128     *
129     * Revision 1.14.2.5 2004/04/08 14:40:49 sebastiani
130     * various bugfixes
131     *
132     * Revision 1.14.2.4 2004/04/06 16:14:46 sebastiani
133     * update
134     *
135     * Revision 1.14.2.3 2004/04/06 16:01:20 sebastiani
136     * various bugfixes (voltage,errors,CCA infos)
137     *
138     * Revision 1.14.2.2 2004/04/06 13:55:29 sebastiani
139     * new updates:put check voltage out of the ipm check cycle; special management for space chain (enable ipm); bugfix in the PWR_CheckIPM_VoltageRange
140     *
141     * Revision 1.15 2004/03/08 15:49:09 alfarano
142     * improved handling functions for FE
143     *
144     * Revision 1.14 2003/12/11 18:10:18 sebastiani
145     * Full buffer in HB not logged any more
146     * and bug fix in PWR_PowerOn
147     *
148     * Revision 1.13 2003/12/11 17:19:59 sebastiani
149     * *** empty log message ***
150     *
151     * Revision 1.12 2003/12/11 11:35:47 sebastiani
152     * IPM error bit managerment
153     *
154     * Revision 1.11 2003/12/08 10:22:29 sebastiani
155     * voltage check inside ipm check, error_status for CCA better provided and implemented
156     *
157     * Revision 1.10 2003/12/07 12:12:13 sebastiani
158     * update
159     *
160     * Revision 1.9 2003/12/06 08:32:38 faber
161     * startup procedure tuned. TMTC sampling storing at startup
162     *
163     * Revision 1.8 2003/12/04 17:16:08 sebastiani
164     * GS debug/tests, and other
165     *
166     * Revision 1.7 2003/12/03 14:36:51 faber
167     * more action definition about mcmd (setmode/purge_trd).
168     * SSt word better defined
169     *
170     * Revision 1.6 2003/12/02 11:05:33 faber
171     * first CCA info for IPMs
172     * first technologica model's SELECT MODE management
173     *
174     * Revision 1.5 2003/12/01 09:27:16 sebastiani
175     * CCA info for Gas Module and first implementation of IPM infos.
176     *
177     * Revision 1.4 2003/11/28 14:42:48 faber
178     * *** empty log message ***
179     *
180     * Revision 1.3 2003/11/27 17:53:23 faber
181     * -Power management poweron procedure done and some tested in the simulator
182     * -history entry 5 now takes OBT
183     *
184     * Revision 1.2 2003/11/26 16:39:33 faber
185     * advancing development for power management
186     *
187     * Revision 1.1 2003/11/19 15:47:03 faber
188     dq1t4 * System Control Manager (SCM) and Power Handler (PWR) modules introduced
189     *
190     * Revision 1.1 2003/10/03 16:12:26 faber
191     * *** empty log message ***
192     *
193     *
194     *****************************************************************************/
195    
196    
197    
198     /*============================= Include File ================================*/
199    
200     #include <src/INFN/LU_SourceFileID_INFN.h>
201     #define __FILEID__ _PWR_PowerHandler_INFN__c
202     #include <src/INFN/PRH_ParamHandler_INFN.h>
203     #include <src/INFN/LU_LogUtility_INFN.h>
204     #include <src/INFN/PRH_ParamHandler_INFN_auto.h>
205     #include <src/INFN/ALM_Alarm_INFN.h>
206    
207     LU_DECL_MASK();
208    
209     #include <src/TM_TCManager/TMTCManager/TM_TMTCManager_p.h>
210     #include <src/INFN/KHB_Driver_INFN.h>
211     #include <src/INFN/PWR_PowerHandler_INFN.h>
212     #include <src/INFN/CM_Common_INFN.h>
213     #include <src/INFN/HK_Manager_INFN.h>
214    
215     //#define PWR_IPM_CHECK(var,ipm) (var & (1 << ipm))
216     #define PWR_KHB_33_CHECK_RETRY 3
217    
218     #define PWR_IPMSTATUS_INIT 0x00FC
219     /*****************************************************************************/
220     /*============================= Object variables ============================*/
221    
222    
223     static CM_ON_OFF PWR_output_values_ipm[PWR_IPM6_MAX];
224    
225     static CM_HOT_COLD PWR_ipm_hot_cold[PWR_IPM3_MAX];
226    
227     static BOOL PWR_Check_IPM_Timeout = TRUE;
228    
229     static PWR_IPM6 PWR_IPM_TWIN[6] = {PWR_IPM_2,PWR_IPM_1,PWR_IPM_4,PWR_IPM_3,PWR_IPM_6,PWR_IPM_5};
230     static CM_ON_OFF PWR_real_values_ipm_cc[PWR_IPM6_MAX];
231     static CM_ON_OFF PWR_mask_ipm_hl_status[PWR_IPM6_MAX];
232     static CM_ON_OFF PWR_masked_ipm_hl_status[PWR_IPM6_MAX];
233     static CM_ON_OFF PWR_tab_ipm[PWR_IPM6_MAX];
234     static BOOL PWR_error_voltage_status_ipm[PWR_IPM6_MAX];
235     static BOOL PWR_error_voltage_ool_ipm[PWR_IPM6_MAX];
236     static BOOL PWR_error_status_ipm[PWR_IPM6_MAX];
237     static CM_HOT_COLD PWR_KHB_hc;
238    
239     /* status word (SW) IPM for the CCA: */
240    
241     /* BIT 1 */
242     #define PWR_IPM_SW_EMERGENCY_SIGNAL_IPM_SPARE (1<<0)
243     static BOOL PWR_ipm_emergency_signal_spare;
244    
245     /* BIT 2 */
246     #define PWR_IPM_SW_EMERGENCY_SIGNAL_IPM_MAIN (1<<1)
247     static BOOL PWR_ipm_emergency_signal_main;
248    
249     static UINT16 PWR_IPM_SW_ERROR[6]={
250     (1<<7) /* IPM1: bit 8 */,
251     (1<<4) /* IPM2: bit 5 */,
252     (1<<6) /* IPM3: bit 7 */,
253     (1<<3) /* IPM4: bit 4 */,
254     (1<<5) /* IPM5: bit 6 */,
255     (1<<2) /* IPM6: bit 3 */
256     };
257    
258     /* BIT 9 */
259     #define PWR_IPM_SW_ERROR_HISTORY_SPARE (1<<8)
260     static BOOL PWR_ipm_error_history_spare;
261    
262     /* BIT 10 */
263     #define PWR_IPM_SW_ERROR_HISTORY_MAIN (1<<9)
264     static BOOL PWR_ipm_error_history_main;
265    
266     static UINT16 PWR_IPM_SW_POWER_OK[6]={
267     (1<<15) /* IPM1: bit 16 */,
268     (1<<12) /* IPM2: bit 13 */,
269     (1<<14) /* IPM3: bit 15 */,
270     (1<<11) /* IPM4: bit 12 */,
271     (1<<13) /* IPM5: bit 14 */,
272     (1<<10) /* IPM6: bit 11 */
273     };
274    
275    
276    
277    
278     status_code PWR_GetIPMStatus(UINT16* IPMStatus)
279     {
280     PWR_IPM6 ipm;
281     UINT16 result=0;
282     if(PWR_ipm_emergency_signal_spare)
283     result |= PWR_IPM_SW_EMERGENCY_SIGNAL_IPM_SPARE;
284    
285     if(PWR_ipm_emergency_signal_main)
286     result |= PWR_IPM_SW_EMERGENCY_SIGNAL_IPM_MAIN;
287    
288     if(PWR_ipm_error_history_spare)
289     result |= PWR_IPM_SW_ERROR_HISTORY_SPARE;
290     if(PWR_ipm_error_history_main)
291     result |= PWR_IPM_SW_ERROR_HISTORY_MAIN;
292    
293     for(ipm=PWR_IPM_1;ipm<=PWR_IPM_6;ipm++) {
294     if(PWR_error_voltage_ool_ipm[ipm])
295     result |= PWR_IPM_SW_POWER_OK[ipm];
296     if(!PWR_error_status_ipm[ipm])
297     result |= PWR_IPM_SW_ERROR[ipm];
298     }
299    
300     *IPMStatus=result;
301     return CM_RC_SUCCESSFUL;
302     }
303    
304    
305    
306     /*****************************************************************************/
307    
308     /* P a y l o a d s O P E R A T I O N A L F U N C T I O N S */
309    
310     /*****************************************************************************/
311     /* @Function: PWR_InitHKManager */
312     /* @Purpose : */
313     /* Initialialization function of the HK component. */
314     /* */
315     /* @@ */
316     /* @Parameter Name @Mode @Description */
317     /* status_code OUT Return code */
318     /* @@ */
319     /*****************************************************************************/
320    
321     status_code PWR_Init(void) {
322     PWR_IPM6 ipm;
323    
324     PWR_ipm_emergency_signal_spare=FALSE;
325     PWR_ipm_emergency_signal_main=FALSE;
326     PWR_ipm_error_history_main=FALSE;
327     PWR_ipm_error_history_spare=FALSE;
328    
329     PWR_output_values_ipm[PWR_IPM_1]=CM_ON;
330     PWR_output_values_ipm[PWR_IPM_2]=CM_OFF;
331     PWR_output_values_ipm[PWR_IPM_3]=CM_ON;
332     PWR_output_values_ipm[PWR_IPM_4]=CM_OFF;
333     PWR_output_values_ipm[PWR_IPM_5]=CM_ON;
334     PWR_output_values_ipm[PWR_IPM_6]=CM_OFF;
335    
336     for(ipm=PWR_IPM_1;ipm<=PWR_IPM_6;ipm++) {
337     PWR_error_status_ipm[ipm]=FALSE;
338     PWR_real_values_ipm_cc[ipm]=CM_OFF;
339     PWR_error_voltage_ool_ipm[ipm]=FALSE;
340     PWR_error_voltage_status_ipm[ipm]=FALSE;
341     }
342     return SUCCESSFUL;
343     }
344    
345    
346     status_code PWR_KRB_IPM(PWR_IPM6 ipm,CM_ON_OFF *oo) {
347     status_code s;
348     TM_INFN_TELEMETRY id;
349     switch(ipm) {
350     case PWR_IPM_1:
351     id=TM_KRB_IPM1;
352     break;
353     case PWR_IPM_2:
354     id=TM_KRB_IPM2;
355     break;
356     case PWR_IPM_3:
357     id=TM_KRB_IPM3;
358     break;
359     case PWR_IPM_4:
360     id=TM_KRB_IPM4;
361     break;
362     case PWR_IPM_5:
363     id=TM_KRB_IPM5;
364     break;
365     case PWR_IPM_6:
366     id=TM_KRB_IPM6;
367     break;
368     default:
369     // INT
370     break;
371     }
372     #ifndef SIMULATOR
373     return PWR_ReadCC(id,CM_ON,CM_OFF,oo);
374     #else
375     return CM_RC_SUCCESSFUL;
376     #endif
377     }
378    
379     status_code PWR_ReadCC(TM_INFN_TELEMETRY id,CM_ON_OFF ifzero,CM_ON_OFF ifnonzero,CM_ON_OFF *oo) {
380     unsigned int v;
381     status_code s;
382     #ifndef SIMULATOR
383     s=HK_GetTMValue(id,&v);
384     #else
385     s=CM_RC_SUCCESSFUL;
386     v=0;
387     #endif
388     if(s == CM_RC_SUCCESSFUL) {
389     if(v)
390     * oo = ifnonzero;
391     else
392     * oo = ifzero;
393     }
394     return s;
395     }
396    
397     status_code PWR_SendTC(TM_INFN_TELECOMMANDS id) {
398     #ifndef SIMULATOR
399     return HK_SendTC(id,TM_HL_DUMMYVALUE);
400     #else
401     return CM_RC_SUCCESSFUL;
402     #endif
403     }
404    
405     status_code PWR_SendTC_PS(TM_INFN_TELECOMMANDS id) {
406     status_code status = PWR_SendTC(id);
407     OS_piTaskSuspend(500);
408     return status;
409     }
410    
411    
412     status_code PWR_SwitchOn_IPM(PWR_IPM6 ipm) {
413     unsigned int v;
414     status_code s;
415     TM_INFN_TELECOMMANDS id;
416     switch(ipm) {
417     case PWR_IPM_1:
418     id=TM_IPM1_ON;
419     break;
420     case PWR_IPM_2:
421     id=TM_IPM2_ON;
422     break;
423     case PWR_IPM_3:
424     id=TM_IPM3_ON;
425     break;
426     case PWR_IPM_4:
427     id=TM_IPM4_ON;
428     break;
429     case PWR_IPM_5:
430     id=TM_IPM5_ON;
431     break;
432     case PWR_IPM_6:
433     id=TM_IPM6_ON;
434     break;
435     default:
436     // INT
437     break;
438     }
439     PWR_output_values_ipm[ipm]=CM_ON;
440     PWR_mask_ipm_hl_status[ipm]=CM_ON;
441     return PWR_SendTC(id);
442     }
443    
444     status_code PWR_SwitchOff_IPM(PWR_IPM3 couple) {
445     TM_INFN_TELECOMMANDS id;
446     PWR_IPM6 ipm1,ipm2;
447     switch(couple) {
448     case PWR_IPM_12:
449     id=TM_IPM12_OFF;
450     ipm1=PWR_IPM_1;
451     ipm2=PWR_IPM_2;
452     break;
453     case PWR_IPM_34:
454     id=TM_IPM34_OFF;
455     ipm1=PWR_IPM_3;
456     ipm2=PWR_IPM_4;
457     break;
458     case PWR_IPM_56:
459     id=TM_IPM56_OFF;
460     ipm1=PWR_IPM_5;
461     ipm2=PWR_IPM_6;
462     break;
463     default:
464     // INT
465     break;
466     }
467     PWR_output_values_ipm[ipm1]=CM_OFF;
468     PWR_output_values_ipm[ipm2]=CM_OFF;
469    
470     PWR_mask_ipm_hl_status[ipm1]=CM_OFF;
471     PWR_mask_ipm_hl_status[ipm2]=CM_OFF;
472     #ifndef SIMULATOR
473     return PWR_SendTC(id);
474     #endif
475     }
476    
477     #if 0
478     status_code PWR_KHB_33_Check(CM_HOT_COLD hc) {
479     CM_ON_OFF oo;
480     UINT32 i;
481     status_code s;
482     #warning "QUESTA FUNZIONE VA ELIMINATA!!!"
483     #warning "there's no reference for TM_KHB_HOT_33DC TM_KHB_COLD_33D TM_KHB_PWR_33_HOT_ON TM_KHB_PWR_33_COLD_ON on the docs j8,j9"
484    
485     // TM_INFN_TELEMETRY id_tm = hc == CM_HOT ? TM_KHB_HOT_33DC : TM_KHB_COLD_33DC;
486     // TM_INFN_TELECOMMANDS id_hl = hc == CM_HOT ? TM_KHB_PWR_33_HOT_ON : TM_KHB_PWR_33_COLD_ON;
487     // TBD: this is only for the TM tests:
488     // KHB_SetSerialLine(hc);
489     // PWR_KHB_hc = hc;
490     return CM_RC_SUCCESSFUL;
491     #if 0
492     #define PWR_KHB_READ_CC PWR_ReadCC(id_tm,CM_OFF,CM_ON,&oo)
493     PWR_KHB_READ_CC;
494     if(oo == CM_ON)
495     s=CM_RC_SUCCESSFUL;
496     else {
497     for(i=0;i<PWR_KHB_33_CHECK_RETRY;i++) {
498     PWR_SendTC(id_hl);
499     }
500     PWR_KHB_READ_CC;
501     PWR_ReadCC(id_tm,CM_OFF,CM_ON,&oo);
502     if(oo == CM_ON)
503     s=CM_RC_SUCCESSFUL;
504     else
505     s=CM_RC_NO_POWER;
506     }
507     #undef PWR_KHB_READ_CC
508     if(s==CM_RC_SUCCESSFUL) {
509     KHB_SetSerialLine(hc);
510     PWR_KHB_hc = hc;
511     }
512     #endif
513     }
514     #endif
515    
516     rtems_timer_service_routine PWR_Check_IPM_Timeout_ISR(
517     rtems_id timer_id,
518     void *run_counter
519     ) {
520     PWR_Check_IPM_Timeout = TRUE;
521     }
522    
523    
524    
525     status_code PWR_ReadVoltage(PWR_IPM6 ipm,UINT32 *voltage) {
526     status_code s;
527     TM_INFN_TELECOMMANDS id;
528     switch(ipm) {
529     case PWR_IPM_1:
530     id=TM_IPM_MOV_IPM1;
531     break;
532     case PWR_IPM_2:
533     id=TM_IPM_MOV_IPM2;
534     break;
535     case PWR_IPM_3:
536     id=TM_IPM_MOV_IPM3;
537     break;
538     case PWR_IPM_4:
539     id=TM_IPM_MOV_IPM4;
540     break;
541     case PWR_IPM_5:
542     id=TM_IPM_MOV_IPM5;
543     break;
544     case PWR_IPM_6:
545     id=TM_IPM_MOV_IPM6;
546     break;
547     default:
548     // INT
549     break;
550     }
551     #ifndef SIMULATOR
552     return HK_GetTMValue(id,voltage);
553     //return TM_piGetTMValue(id,TM_CURRENT_VAL,voltage);
554     #else
555     return CM_RC_SUCCESSFUL;
556     #endif
557     }
558    
559     status_code PWR_CheckIPM_VoltageRange(PWR_IPM6 ipm,CM_ON_OFF *on_off) {
560     status_code s=CM_RC_SUCCESSFUL;
561     UINT32 voltage;
562     UINT32 *min,*max;
563     if((s=PWR_ReadVoltage(ipm,&voltage))==CM_RC_SUCCESSFUL) {
564     PWR_error_voltage_ool_ipm[ipm]=FALSE;
565     s=CM_RC_SUCCESSFUL;
566     if(voltage >= PRH_ARR_PWR_VOLTAGE_IPM_RANGE_ON_MIN[ipm] &&
567     voltage <= PRH_ARR_PWR_VOLTAGE_IPM_RANGE_ON_MAX[ipm])
568     *on_off=CM_ON;
569     else if(voltage >= PRH_ARR_PWR_VOLTAGE_IPM_RANGE_OFF_MIN[ipm] &&
570     voltage <= PRH_ARR_PWR_VOLTAGE_IPM_RANGE_OFF_MAX[ipm])
571     *on_off=CM_OFF;
572     else {
573     PWR_error_voltage_ool_ipm[ipm]=TRUE;
574    
575     *on_off=CM_ON;
576    
577     s=CM_RC_VALUE_OUT_OFF_RANGE;
578     }
579     }
580     return s;
581     }
582    
583    
584    
585     status_code PWR_CheckIPM_Voltage(BOOL do_action) {
586    
587     CM_ON_OFF oo_voltage,oo_cc;
588     status_code s;
589     status_code status=CM_RC_SUCCESSFUL;
590     BOOL time_out;
591     UINT16 n=0;
592     PWR_IPM3 couple;
593     PWR_IPM6 ipm1,ipm2;
594     /* initialize at hot : */
595     PWR_IPM6 toggle[PWR_IPM3_MAX]={PWR_IPM_1,PWR_IPM_3,PWR_IPM_5};
596     CM_ON_OFF cc_oo[PWR_IPM6_MAX];
597     CM_ON_OFF adc_oo[PWR_IPM6_MAX];
598     CM_ON_OFF wanted1,wanted2;
599     volatile UINT16 i=0;
600     PWR_IPM_ACTION action[PWR_IPM3_MAX];
601     PWR_IPM_TO_ACTION timeout_action[PWR_IPM3_MAX];
602     status_code s1,s2;
603     do {
604     if(PRH_VAR_VERBOSE_DEBUG)
605     /*@LOG PWR_CheckIPM_Voltage: sten no. */
606     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,n);
607     for(couple=PWR_IPM_12;couple<PWR_IPM3_MAX;couple++) {
608     switch(couple) {
609     case PWR_IPM_12:
610     ipm1=PWR_IPM_1;
611     ipm2=PWR_IPM_2;
612     break;
613     case PWR_IPM_34:
614     ipm1=PWR_IPM_3;
615     ipm2=PWR_IPM_4;
616     break;
617     case PWR_IPM_56:
618     ipm1=PWR_IPM_5;
619     ipm2=PWR_IPM_6;
620     break;
621     }
622     wanted1=PRH_ARR_PWR_IPM_CONF[ipm1]==0 ? CM_OFF:CM_ON;
623     wanted2=PRH_ARR_PWR_IPM_CONF[ipm2]==0 ? CM_OFF:CM_ON;
624     /* read cc: */
625     PWR_KRB_IPM(ipm1,&cc_oo[ipm1]);
626     PWR_KRB_IPM(ipm2,&cc_oo[ipm2]);
627     /* read adc */
628     s1=PWR_CheckIPM_VoltageRange(ipm1,&adc_oo[ipm1]);
629     s2=PWR_CheckIPM_VoltageRange(ipm2,&adc_oo[ipm2]);
630    
631     if( s1 != CM_RC_SUCCESSFUL){
632     /*@LOG PWR_CheckIPM_Voltage: error reading voltage range ipm hot - ipm1 << 16 | s1 */
633     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,ipm1 << 16 | s1);
634     adc_oo[ipm1]= wanted1 == CM_ON ? CM_OFF : CM_ON;
635     }
636     if( s2 != CM_RC_SUCCESSFUL){
637     /*@LOG PWR_CheckIPM_Voltage: error reading voltage range ipm cold - ipm2 << 16 | s2*/
638     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,ipm2 << 16 | s2);
639     adc_oo[ipm2]= wanted2== CM_ON ? CM_OFF : CM_ON;
640     }
641    
642     i=
643     ((cc_oo[ipm1]==CM_ON)<<5) |
644     ((cc_oo[ipm2]==CM_ON)<<4) |
645     ((adc_oo[ipm1]==CM_ON)<<3) |
646     ((adc_oo[ipm2]==CM_ON)<<2) |
647     ((wanted1==CM_ON)<<1) |
648     ( wanted2==CM_ON);
649    
650     action[couple]=(PWR_IPM_ACTION)((PRH_TAB_PWR_IPM_ACTION[couple][i]>>4) & 0xF);
651     timeout_action[couple]=(PWR_IPM_TO_ACTION)(PRH_TAB_PWR_IPM_ACTION[couple][i] & 0xF);
652     PWR_ipm_hot_cold[couple]=(CM_HOT_COLD)((PRH_TAB_PWR_IPM_ACTION[couple][i] >> 8) & 0x1);
653     if(do_action) {
654     switch(action[couple]) {
655     case PWR_IPM_ACTION_ON_HOT:
656     PWR_SwitchOff_IPM(couple);
657     PWR_SwitchOn_IPM(ipm1);
658     break;
659     case PWR_IPM_ACTION_ON_COLD:
660     PWR_SwitchOff_IPM(couple);
661     PWR_SwitchOn_IPM(ipm2);
662     break;
663     case PWR_IPM_ACTION_ON_TOGGLED:
664     PWR_SwitchOff_IPM(couple);
665     PWR_SwitchOn_IPM(toggle[couple]);
666     toggle[couple]=PWR_IPM_TWIN[toggle[couple]];
667     break;
668     case PWR_IPM_ACTION_OFF:
669     PWR_SwitchOff_IPM(couple);
670     break;
671     }
672    
673     }
674     }
675     if(do_action)
676     OS_piTaskSuspend(PRH_VAR_PWR_VOLTAGE_DELAY_ATTEMPT);
677     n++;
678     time_out=n > PRH_VAR_PWR_VOLTAGE_N_ATTEMPT;
679    
680     } while(do_action &&
681     !time_out &&
682     !
683     (
684     (
685     action[PWR_IPM_12] == PWR_IPM_ACTION_EXIT_BAD ||
686     action[PWR_IPM_12] == PWR_IPM_ACTION_EXIT_OK
687     ) &&
688     (
689     action[PWR_IPM_34] == PWR_IPM_ACTION_EXIT_BAD ||
690     action[PWR_IPM_34] == PWR_IPM_ACTION_EXIT_OK
691     ) &&
692     (
693     action[PWR_IPM_56] == PWR_IPM_ACTION_EXIT_BAD ||
694     action[PWR_IPM_56] == PWR_IPM_ACTION_EXIT_OK
695     )
696     )
697     );
698     status=CM_RC_SUCCESSFUL;
699     if(timeout_action[PWR_IPM_12] == PWR_IPM_TO_ACTION_STOP ||
700     timeout_action[PWR_IPM_34] == PWR_IPM_TO_ACTION_STOP ||
701     timeout_action[PWR_IPM_56] == PWR_IPM_TO_ACTION_STOP
702     ) {
703     if(do_action) {
704     PWR_DcdcOFF(TRUE);
705     }
706     status=CM_RC_DO_STOP_WAIT;
707     }
708     if(PRH_VAR_VERBOSE_DEBUG) {
709     for(couple=PWR_IPM_12;couple<PWR_IPM3_MAX;couple++) {
710     /*@LOG PWR_CheckIPM_Voltage: end of function - couple */
711     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,couple);
712     /*@LOG PWR_CheckIPM_Voltage: end of function - action[couple] */
713     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,action[couple]);
714     /*@LOG PWR_CheckIPM_Voltage: end of function - timeout_action[couple] */
715     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,timeout_action[couple]);
716     }
717     /*@LOG PWR_CheckIPM_Voltage: end of function - status */
718     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
719     }
720     if(status == CM_RC_SUCCESSFUL) {
721     /* update the real ipm status according to the ACD values . we decide to trust in adc_oo read above */
722     for(ipm1=PWR_IPM_1;ipm1<PWR_IPM6_MAX;ipm1++)
723     PWR_output_values_ipm[ipm1]=adc_oo[ipm1];
724     }
725     return status;
726     }
727    
728    
729    
730    
731     status_code PWR_IPM_WaitOK() {
732    
733     CM_ON_OFF oo_cc;
734     status_code s;
735     status_code status=CM_RC_SUCCESSFUL;
736     BOOL time_out;
737     UINT16 n=0;
738     PWR_IPM3 couple;
739     PWR_IPM6 ipm1,ipm2;
740     /* initialize at hot : */
741     CM_ON_OFF cc_oo[PWR_IPM6_MAX];
742     BOOL exit[PWR_IPM3_MAX];
743     CM_ON_OFF wanted1,wanted2;
744     volatile UINT16 i=0;
745     status_code s1,s2;
746     do {
747     /*@LOG PWR_IPM_WaitOK: step no. */
748     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,n);
749     for(couple=PWR_IPM_12;couple<PWR_IPM3_MAX;couple++) {
750     switch(couple) {
751     case PWR_IPM_12:
752     ipm1=PWR_IPM_1;
753     ipm2=PWR_IPM_2;
754     break;
755     case PWR_IPM_34:
756     ipm1=PWR_IPM_3;
757     ipm2=PWR_IPM_4;
758     break;
759     case PWR_IPM_56:
760     ipm1=PWR_IPM_5;
761     ipm2=PWR_IPM_6;
762     break;
763     }
764     wanted1=PRH_ARR_PWR_IPM_CONF[ipm1]==0 ? CM_OFF:CM_ON;
765     wanted2=PRH_ARR_PWR_IPM_CONF[ipm2]==0 ? CM_OFF:CM_ON;
766     /* read cc: */
767     PWR_KRB_IPM(ipm1,&cc_oo[ipm1]);
768     PWR_KRB_IPM(ipm2,&cc_oo[ipm2]);
769     /* read adc */
770     i=
771     ((cc_oo[ipm1]==CM_ON)<<3) |
772     ((cc_oo[ipm2]==CM_ON)<<2) |
773     ((wanted1==CM_ON)<<1) |
774     ( wanted2==CM_ON);
775     /* CC1 CC2 WANT1 WANT2 */
776     exit[couple]
777     = (i == 0x00 || /* 0 0 0 0 */
778     i == 0x5 || /* 0 1 0 1 */
779     i == 0x7 || /* 0 1 1 1 */
780     i == 0xA || /* 1 0 1 0 */
781     i == 0xB /* 1 0 1 1 */
782     );
783     /*@LOG PWR_IPM_WaitOK loop - couple << 16 | exit[couple] */
784     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,couple << 16 | exit[couple]);
785     }
786    
787     OS_piTaskSuspend(PRH_VAR_PWR_IPM_WAIT_OK_DELAY_ATTEMPT);
788     n++;
789     time_out=n > PRH_VAR_PWR_IPM_WAIT_OK_N_ATTEMPT;
790     } while(!time_out &&
791     !
792     (
793     exit[PWR_IPM_12] && exit[PWR_IPM_34] && exit[PWR_IPM_56]
794     )
795     );
796     /*@LOG PWR_IPM_WaitOK end of function - time_out */
797     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,time_out);
798     return CM_RC_SUCCESSFUL;
799     }
800    
801    
802     status_code PWR_PowerCheck(BOOL do_action) {
803     status_code ps;
804    
805     ps = PWR_CheckIPM_Voltage(do_action);
806     if(ps == CM_RC_SUCCESSFUL) {
807    
808     }
809     return ps;
810     }
811    
812    
813    
814     #define PWR_PSB_HK_TIMEOUT 10
815     #define PWR_TRB_HK_TIMEOUT 10
816    
817    
818     status_code PWR_CMD2PSB(UINT16 psbcmd,
819     TM_INFN_TELEMETRY tm_cc_id,
820     CM_ON_OFF expected_cc,
821     ALM_VAR_ID alm_id1,
822     ALM_VAR_ID alm_id2,
823     UINT16 expected_answer)
824     {
825     status_code status;
826     UINT16 outbuf;
827     int i;
828     CM_ON_OFF psb_ccalm;
829     OS_piTaskSuspend(PRH_VAR_PWR_CMD2PSB_DELAY);
830     for(i=0;i<3;i++){
831     status = HK_KHB_Cmd2FE(KHB_POWER_SUPPLY,1,1,&psbcmd,&outbuf,PWR_PSB_HK_TIMEOUT);
832     if(status!=CM_RC_SUCCESSFUL){
833     /*@LOG PSBCommand: KHB Error on PSB Command */
834     ALM_WriteLog(ALM_TRACE_ID,alm_id1);
835     /*@LOG PSBCommand: KHB Error on PSB Command - psbcmd << 16 | status */
836     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,psbcmd << 16 | status);
837     return status;
838     }
839     if(outbuf == expected_answer){
840     status = PWR_ReadCC(tm_cc_id,CM_OFF,CM_ON,&psb_ccalm);
841     if(status!=CM_RC_SUCCESSFUL){
842     /*@LOG PSBCommand: PSB Alarm */
843     ALM_WriteLog(ALM_TRACE_ID,alm_id1);
844     /*@LOG PSBCommand: PSB Alarm - psbcmd << 16 | status */
845     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,psbcmd << 16 | status);
846     return status;
847     }
848     if(psb_ccalm==expected_cc)
849     return CM_RC_SUCCESSFUL;
850     }
851     }
852     /*@LOG PSBCommand: PSB Alarm: too many failed attempts */
853     ALM_WriteLog(ALM_TRACE_ID,alm_id2);
854     /*@LOG PSBCommand: PSB Alarm: too many failed attempts - psbcmd */
855     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,psbcmd);
856     return CM_RC_PSB_ERROR;
857     }
858    
859     static UINT16 PWR_TRB_COMMAND_SET[PWR_TRB_MAX][CM_HOT_COLD_MAX][PWR_TRB_FE_MAX][16] = {
860     #include "PWR_TRB_Commands.include"
861     };
862     /*
863     trb_cmd(0,0,0,0,0x3F00,"$trb_dir/TRB_1_READ_COLD.mcs");
864     trb_cmd(0,0,0,0,0x3C00,"$trb_dir/TRB_1_READ_HOT.mcs");
865     trb_cmd(0,0,0,0,0x5F00,"$trb_dir/TRB_2_READ_COLD.mcs");
866     trb_cmd(0,0,0,0,0x5C00,"$trb_dir/TRB_2_READ_HOT.mcs");
867     */
868     static UINT16 PWR_TRB_COMMAND_READ[PWR_TRB_MAX][CM_HOT_COLD_MAX]={{0x3C00,0x3F00},{0x5C00,0x5F00}};
869    
870    
871     status_code PWR_CMD2TRB_SET(
872     PWR_TRB trb,
873     CM_HOT_COLD hc,
874     PWR_TRB_FE fe,
875     UINT16 cmd)
876     {
877    
878     // PRH_VAR_TYPE trbcmd,ALM_VAR_ID alm_id){
879     status_code status;
880     UINT16 unused;
881     UINT16 combuf=PWR_TRB_COMMAND_SET[trb][hc][fe][cmd];
882     status = HK_KHB_Cmd2FE(KHB_TRACKER_RELAYS,1,0,&combuf,&unused,PWR_TRB_HK_TIMEOUT);
883     if(status!=CM_RC_SUCCESSFUL){
884    
885     /*@LOG KHB command failed on TRB Set */
886     ALM_WriteLog(ALM_TRACE_ID,cmd | (fe<<4) | (hc<<5) | (trb<<6));
887     }
888     else
889     OS_piTaskSuspend(PRH_VAR_PWR_TRB_SET_DELAY);
890     return status;
891     }
892    
893     status_code PWR_CMD2TRB_READ(PWR_TRB trb,CM_HOT_COLD hc,UINT16* outbuf)
894     {
895     // PRH_VAR_TYPE trbcmd,ALM_VAR_ID alm_id,int expetcted,UINT16 *outbuf){
896     status_code status=~CM_RC_SUCCESSFUL;
897     UINT16 combuf=PWR_TRB_COMMAND_READ[trb][hc];
898     int i;
899     for(i=0;i<PRH_VAR_PWR_TRB_READ_ATTEMPTS && status != CM_RC_SUCCESSFUL ;i++) {
900     status = HK_KHB_Cmd2FE(KHB_TRACKER_RELAYS,1,2,&combuf,outbuf,PWR_TRB_HK_TIMEOUT);
901     if(status!=CM_RC_SUCCESSFUL){
902    
903     /*@LOG PWR_CMD2TRB_READ: KHB command failed on TRB Read */
904     ALM_WriteLog(ALM_TRACE_ID,hc | (trb << 1));
905     HK_KHB_Cmd2FE(KHB_TRACKER_RELAYS,1,0,&combuf,outbuf,PWR_TRB_HK_TIMEOUT);
906     OS_piTaskSuspend(PRH_VAR_PWR_TRB_READ_DELAY);
907     }
908     else {
909     OS_piTaskSuspend(PRH_VAR_PWR_TRB_READ_DELAY);
910     status = outbuf[0] == PWR_TRB_COMMAND_READ[trb][hc] + 1 ? CM_RC_SUCCESSFUL : CM_RC_TIMEOUT;
911     if (status != CM_RC_SUCCESSFUL)
912     /*@LOG PWR_CMD2TRB_READ: KHB answer error - outbuf[0] << 16 | status */
913     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,outbuf[0] << 16 | status);
914     }
915     }
916    
917     return status;
918     }
919    
920    
921     status_code PWR_CheckTRB(PRH_VAR_TYPE trbcmd,UINT32 expected_outbuf,ALM_VAR_ID alm_id1,ALM_VAR_ID alm_id2){
922     status_code status;
923     UINT16 combuf=(UINT16)trbcmd;
924     UINT32 outbuf;
925     status = HK_KHB_Cmd2FE(KHB_TRACKER_RELAYS,1,sizeof(outbuf)/2,&combuf,(UINT16*)&outbuf,PWR_TRB_HK_TIMEOUT);
926     if(status!=CM_RC_SUCCESSFUL){
927     /*@LOG KHB command failed on CheckTRB */
928     ALM_WriteLog(ALM_TRACE_ID,alm_id1);
929     return status;
930     }
931     if(expected_outbuf!=outbuf)
932     {
933     /*@LOG CheckTRB: answer is not the same as 'expected' */
934     ALM_WriteLog(ALM_TRACE_ID,alm_id2);
935     status=CM_RC_TRB_ERROR;
936     }
937     return status;
938     }
939    
940    
941    
942    
943     status_code PWR_IF_CMD2PSB(UINT16 cmd,ALM_VAR_ID *psb_almid) {
944     return PWR_CMD2PSB(cmd,TM_PSB_ALARM,CM_OFF,(*psb_almid)++,(*psb_almid)++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL;
945     }
946    
947     status_code PWR_IF_CMD2TOFHV(BYTE idx,BOOL isipm1,ALM_VAR_ID *psb_almid) {
948     status_code s = PWR_CMD2PSB(PRH_ARR_HVB_COMMANDS[idx],
949     isipm1?TM_TOFHV_HOT_ALARM:TM_TOFHV_COLD_ALARM,CM_ON,
950     (*psb_almid)++,(*psb_almid)++,0xFECE);
951     if(s!=CM_RC_SUCCESSFUL) {
952     /*@LOG PWR_HVSetting: failed cmd to HV board - idx of HVB_COMMANDS*/
953     LU_INFN_LOG(LU_WARNING|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,idx);
954     }
955     return (s==CM_RC_SUCCESSFUL);
956     }
957    
958     status_code PWR_IF_CALO_FE(BYTE idx,ALM_VAR_ID *psb_almid) {
959     return PWR_CMD2PSB(PRH_ARR_PSB_CALO_FE[idx],
960     TM_PSB_ALARM,CM_OFF,
961     (*psb_almid)++,(*psb_almid)++,
962     PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL;
963     }
964    
965     status_code PWR_IF_CALO_FE_ON(BYTE idx,ALM_VAR_ID *psb_almid) {
966     return PWR_CMD2PSB(PRH_ARR_PSB_CALO_FE_ON[idx],
967     TM_PSB_ALARM,CM_OFF,
968     (*psb_almid)++,(*psb_almid)++,
969     PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL;
970     }
971    
972    
973    
974     #define IF_CHKTRB(cmd,rep) (PWR_CheckTRB(cmd,rep,trb_almid++,trb_almid++) == CM_RC_SUCCESSFUL)
975    
976     #define PWR_TRB_MOSFET_MASK 0x0447
977    
978     status_code PWR_TRBSetting(UINT16 trk_bias_mask){
979     CM_HOT_COLD ipm_trb;
980     status_code status=CM_RC_DO_POWER_OFF_ON,s;
981     ALM_VAR_ID trb_almid=ALM_TRBSET_FIRSTERROR;
982     UINT16 unused;
983    
984     PWR_TRB trb;
985     CM_HOT_COLD hc;
986     PWR_TRB_FE fe;
987    
988     UINT16 ans[PWR_TRB_MAX][CM_HOT_COLD_MAX][2];
989     UINT16 action[PWR_TRB_MAX][CM_HOT_COLD_MAX] = {{0,0},{0,0}};
990     UINT16 onoff[PWR_TRB_MAX][CM_HOT_COLD_MAX] = {{0,0},{0,0}};
991     static UINT16 MASK[PWR_TRB_FE_MAX] = {0x0003,0x003C,0x03C0,0x3C00};
992     UINT16 x;
993     UINT16 action_flag=0;
994     #warning deve essere dichiarata qui questa var ?
995     ALM_VAR_ID psb_almid=0;
996     UINT16 trb1_set = PRH_VAR_PWR_TRB1_SET & trk_bias_mask;
997     UINT16 trb2_set = PRH_VAR_PWR_TRB2_SET & trk_bias_mask;
998    
999     UINT16 des[PWR_TRB_MAX][CM_HOT_COLD_MAX] = {
1000     {PWR_TRB_MOSFET_MASK & trb1_set,
1001     PWR_TRB_MOSFET_MASK & trb2_set},
1002     {PWR_TRB_MOSFET_MASK & trb1_set,
1003     PWR_TRB_MOSFET_MASK & trb2_set}
1004     };
1005    
1006    
1007     ipm_trb = PWR_ipm_hot_cold[PWR_IPM_34];
1008    
1009     if(! PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRB_S9004_34_ON],&psb_almid))
1010     return status;
1011    
1012     /*
1013     // fix the TRB board communication error
1014    
1015     for(trb=PWR_TRB_MIN;trb<PWR_TRB_MAX;trb++)
1016     for(hc=CM_HOT;hc<CM_HOT_COLD_MAX;hc++) {
1017     if(PWR_CMD2TRB_READ(trb,hc,ans[trb][hc])!=CM_RC_SUCCESSFUL)
1018     return status;
1019     }
1020     */
1021    
1022     des[PWR_TRB1][ipm_trb]=trb1_set;
1023     des[PWR_TRB2][ipm_trb]=trb2_set;
1024    
1025     // fix the TRB board communication error
1026     for(trb=PWR_TRB_MIN;trb<PWR_TRB_MAX;trb++)
1027     for(hc=CM_HOT;hc<CM_HOT_COLD_MAX;hc++)
1028     ans[trb][hc][1]= 0x3FFF & (~des[trb][hc]);
1029    
1030    
1031     /*
1032     by the diagram the table is:
1033    
1034     ANS DES ACTION ONOFF
1035     0 0 0 0
1036     0 1 1 1
1037     1 0 1 0
1038     1 1 0 1
1039     */
1040    
1041     for(trb=PWR_TRB_MIN;trb<PWR_TRB_MAX;trb++)
1042     for(hc=CM_HOT;hc<CM_HOT_COLD_MAX;hc++) {
1043     action[trb][hc] = (ans[trb][hc][1] ^ des[trb][hc]) & 0x3FFF;
1044     onoff [trb][hc] = des[trb][hc] & 0x3FFF;
1045     action_flag |= action[trb][hc];
1046     }
1047    
1048     if(action_flag) {
1049     if(! PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRB_S9004_ALL_ON],&psb_almid))
1050     return status;
1051    
1052     OS_piTaskSuspend(PRH_VAR_PSB_TRB_S9004_ALL_ON_DELAY);
1053    
1054     for(trb=PWR_TRB_MIN;trb<PWR_TRB_MAX;trb++)
1055     for(hc=CM_HOT;hc<CM_HOT_COLD_MAX;hc++)
1056     for(fe=PWR_TRB_FE_MIN;fe<PWR_TRB_FE_MAX;fe++)
1057     if(action[trb][hc] & MASK[fe]) {
1058     x=(onoff[trb][hc] & MASK[fe]) >> (fe==0 ? 0 : (2*(2*fe-1) ));
1059     if(PWR_CMD2TRB_SET(trb,hc,fe,x) != CM_RC_SUCCESSFUL)
1060     return status;
1061     }
1062     }
1063    
1064     if( ( (PWR_TRB_MOSFET_MASK & trb1_set) != PWR_TRB_MOSFET_MASK) ||
1065     ( (PWR_TRB_MOSFET_MASK & trb2_set) != PWR_TRB_MOSFET_MASK)
1066     )
1067     {
1068     if(! PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRB_S9004_34_ON],&psb_almid))
1069     return status;
1070     }
1071     else if(! PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRB_S9004_OFF],&psb_almid))
1072     return status;
1073    
1074     return CM_RC_SUCCESSFUL;
1075     }
1076    
1077    
1078    
1079    
1080    
1081    
1082    
1083    
1084     void PWR_DcdcOFF(BOOL do_12_any_case){
1085     status_code status;
1086     PRH_VAR_PAMELA_ON=0;
1087     status = PWR_SendTC(TM_PS_OFF);
1088     // status = PWR_CMD2PSB(PRH_VAR_PSB_OFF,TM_PSB_ALARM,ALM_DCDC_PWROFF_KHBERROR,ALM_DCDC_PWROFF_CCERROR);
1089     if(do_12_any_case || status!=CM_RC_SUCCESSFUL)
1090     PWR_SwitchOff_IPM(PWR_IPM_12);
1091     PWR_SwitchOff_IPM(PWR_IPM_34);
1092     PWR_SwitchOff_IPM(PWR_IPM_56);
1093     }
1094    
1095     status_code PWR_HLSetting(){
1096     status_code status;
1097     status = PWR_SendTC_PS(TM_KHB_PWR_33_OFF);
1098    
1099     if (status == CM_RC_SUCCESSFUL)
1100     {
1101     if(PRH_VAR_POWER_KHB==CM_HOT){//HOT
1102     status = PWR_SendTC_PS(TM_KHB_PWR_33_HOT_ON);
1103     if (status != CM_RC_SUCCESSFUL)
1104     /*@LOG PWR_HLSetting: error sendiing TM_KHB_PWR_33_HOT_ON - status */
1105     LU_INFN_LOG(LU_CRITICAL|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1106     status = HK_KHB_SetHotCold(CM_HOT);
1107     if (status != CM_RC_SUCCESSFUL)
1108     /*@LOG PWR_HLSetting: error setting HK_KHB_SetHotCold(CM_HOT) - status */
1109     LU_INFN_LOG(LU_CRITICAL|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1110     }
1111     else{//COLD
1112     status = PWR_SendTC_PS(TM_KHB_PWR_33_COLD_ON);
1113     if (status != CM_RC_SUCCESSFUL)
1114     /*@LOG PWR_HLSetting: error sendiing TM_KHB_PWR_33_COLD_ON - status */
1115     LU_INFN_LOG(LU_CRITICAL|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1116     status = HK_KHB_SetHotCold(CM_COLD);
1117     if (status != CM_RC_SUCCESSFUL)
1118     /*@LOG PWR_HLSetting: error setting HK_KHB_SetHotCold(CM_COLD) - status */
1119     LU_INFN_LOG(LU_CRITICAL|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1120     }
1121     }
1122     return status;
1123     }
1124    
1125    
1126    
1127     status_code PWR_HVSetting()
1128     {
1129     status_code status=CM_RC_DO_POWER_OFF_ON;
1130     ALM_VAR_ID psb_almid=ALM_HV_FIRSTERROR;
1131     BOOL isipm1 = ( PWR_output_values_ipm[PWR_IPM_1] == CM_ON );
1132    
1133     if(!(
1134     PWR_IF_CMD2TOFHV(0,isipm1,&psb_almid) &&
1135     PWR_IF_CMD2TOFHV(1,isipm1,&psb_almid) &&
1136     PWR_IF_CMD2TOFHV(2,isipm1,&psb_almid) &&
1137     PWR_IF_CMD2TOFHV(3,isipm1,&psb_almid) &&
1138     PWR_IF_CMD2TOFHV(4,isipm1,&psb_almid) &&
1139     PWR_IF_CMD2TOFHV(5,isipm1,&psb_almid) &&
1140     PWR_IF_CMD2TOFHV(6,isipm1,&psb_almid) &&
1141     PWR_IF_CMD2TOFHV(7,isipm1,&psb_almid) &&
1142     PWR_IF_CMD2TOFHV(8,isipm1,&psb_almid) &&
1143     PWR_IF_CMD2TOFHV(9,isipm1,&psb_almid) &&
1144     PWR_IF_CMD2TOFHV(10,isipm1,&psb_almid) &&
1145     PWR_IF_CMD2TOFHV(11,isipm1,&psb_almid)
1146     ))
1147     /* some of them get error successful */
1148     {
1149     /*@LOG PWR_HVSetting: failed first reset, retry - status */
1150     LU_INFN_LOG(LU_WARNING|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,0xBABE);
1151     }
1152     return CM_RC_SUCCESSFUL;
1153     }
1154    
1155    
1156     #define TOF_FE56_OFF 0x0000
1157     #define TOF_FE12_OFF 0x1418
1158     #define TOF_FE34_OFF 0x150B
1159     #define TOF_FE56_ON 0x00C5
1160     #define TOF_FE12_ON 0x14DD
1161     #define TOF_FE34_ON 0x15CE
1162    
1163     status_code PWR_PSBforTOFSetting(BOOL switchon){
1164    
1165     status_code status = CM_RC_SUCCESSFUL;
1166     ALM_VAR_ID psb_almid=ALM_PSBTOFSET_FIRSTERROR;
1167     PWR_IF_CMD2PSB(TOF_FE56_OFF,&psb_almid);
1168     PWR_IF_CMD2PSB(TOF_FE12_OFF,&psb_almid);
1169     PWR_IF_CMD2PSB(TOF_FE34_OFF,&psb_almid);
1170    
1171     if(switchon){
1172     if(
1173     PWR_IF_CMD2PSB(TOF_FE56_ON,&psb_almid) &&
1174     PWR_IF_CMD2PSB(TOF_FE12_ON,&psb_almid) &&
1175     PWR_IF_CMD2PSB(TOF_FE34_ON,&psb_almid)
1176     )
1177     status = CM_RC_SUCCESSFUL;
1178     else
1179     status = CM_RC_DO_POWER_OFF_ON;
1180     }
1181     return status;
1182    
1183     }
1184    
1185     status_code PWR_PSBSetting(){
1186     status_code status=CM_RC_DO_POWER_OFF_ON;
1187     ALM_VAR_ID psb_almid=ALM_PSBSET_FIRSTERROR;
1188     BOOL isipm1;
1189     isipm1 = ( PWR_output_values_ipm[PWR_IPM_1] == CM_ON );
1190    
1191    
1192    
1193     if(
1194     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRIGGER_OFF],&psb_almid) &&
1195     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_5_6_S9004],&psb_almid) &&
1196     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_S4],&psb_almid) &&
1197     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_ANTI],&psb_almid) &&
1198     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_HV_CONT_PB],&psb_almid) &&
1199     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_PULSER],&psb_almid) &&
1200     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRB_S9004],&psb_almid) &&
1201     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_CALO_DSP_1_2],&psb_almid) &&
1202     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_CALO_DSP_3_4],&psb_almid) &&
1203     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_1_2_S9006],&psb_almid) &&
1204     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_3_4_S9006],&psb_almid) &&
1205     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_5_6_S9006],&psb_almid) &&
1206     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRACKER_DSP_1],&psb_almid) &&
1207     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRACKER_DSP_2],&psb_almid) &&
1208     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_S4_ADC],&psb_almid) &&
1209     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_DSP],&psb_almid) &&
1210     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRIGGER],&psb_almid) &&
1211     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_IDAQ],&psb_almid) &&
1212     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TRACKER_SENSOR],&psb_almid) &&
1213     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_1_2_S9004],&psb_almid) &&
1214     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_TOF_3_4_S9004],&psb_almid) &&
1215     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_PMT_1],&psb_almid) &&
1216     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_PMT_2],&psb_almid) &&
1217     PWR_IF_CMD2PSB(PRH_ARR_PSB_COMMANDS[PWR_PSB_PMT_3],&psb_almid) &&
1218     PWR_IF_CMD2PSB(PRH_ARR_PSB_CALO_FE_OFF[0],&psb_almid) &&
1219     PWR_IF_CMD2PSB(PRH_ARR_PSB_CALO_FE_OFF[1],&psb_almid) &&
1220     PWR_IF_CMD2PSB(PRH_ARR_PSB_CALO_FE_OFF[2],&psb_almid) &&
1221     PWR_IF_CMD2PSB(PRH_ARR_PSB_CALO_FE_OFF[3],&psb_almid)
1222     )
1223     /* all of them were successful */
1224     status=CM_RC_SUCCESSFUL;
1225     else
1226     /* some of functions have failed */
1227     status=CM_RC_DO_POWER_OFF_ON;
1228     return status;
1229     }
1230    
1231     status_code PWR_CalFe57(BOOL iscustom){
1232     status_code status=CM_RC_SUCCESSFUL;
1233     ALM_VAR_ID psb_almid;
1234     if(PRH_VAR_CAL_OK){
1235     status=CM_RC_DO_POWER_OFF_ON;
1236     OS_piTaskSuspend(PRH_VAR_PSB_CALOFE_DELAY);
1237     if(iscustom){
1238     psb_almid=ALM_PSBSETCALCUSTOM_FIRSTERROR;
1239    
1240     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_1,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1241     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_2,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1242     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_3,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1243     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_4,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1244     /* status=CM_RC_SUCCESSFUL; */
1245    
1246     if(
1247     PWR_IF_CALO_FE(0,&psb_almid) &&
1248     PWR_IF_CALO_FE(1,&psb_almid) &&
1249     PWR_IF_CALO_FE(2,&psb_almid) &&
1250     PWR_IF_CALO_FE(3,&psb_almid)
1251     )
1252     status=CM_RC_SUCCESSFUL;
1253    
1254     }
1255    
1256     else{
1257     psb_almid=ALM_PSBSETCAL_FIRSTERROR;
1258    
1259     if(
1260     PWR_IF_CALO_FE_ON(0,&psb_almid) &&
1261     PWR_IF_CALO_FE_ON(1,&psb_almid) &&
1262     PWR_IF_CALO_FE_ON(2,&psb_almid) &&
1263     PWR_IF_CALO_FE_ON(3,&psb_almid)
1264     )
1265     status=CM_RC_SUCCESSFUL;
1266    
1267     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_1_ON,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1268     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_2_ON,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1269     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_3_ON,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1270     /* if(PWR_CMD2PSB(PRH_VAR_PSB_CALO_FE_4_ON,TM_PSB_ALARM,psb_almid++,psb_almid++,PWR_PSB_STANDARD_ANSWER) == CM_RC_SUCCESSFUL) */
1271     /* status=CM_RC_SUCCESSFUL; */
1272    
1273     }
1274     }
1275     return status;
1276     }
1277    
1278    
1279     status_code PWR_InitBoard_twice() {
1280     status_code s=HK_KHB_InitBoard();
1281     if(s) {
1282     /*@LOG PWR_InitBoard_twice: failed first reset, retry - status */
1283     LU_INFN_LOG(LU_WARNING|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,s);
1284     if(PRH_VAR_PWR_KHB_INITBOARD_TWICE_DELAY)
1285     OS_piTaskSuspend(PRH_VAR_PWR_KHB_INITBOARD_TWICE_DELAY);
1286     s=HK_KHB_InitBoard();
1287     if(s) {
1288     /*@LOG PWR_InitBoard_twice: failed second attempt: error in reset! - s */
1289     LU_INFN_LOG(LU_CRITICAL|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,s);
1290     }
1291     }
1292     return s;
1293     }
1294    
1295     status_code PWR_DcdcON(){
1296     status_code status = CM_RC_SUCCESSFUL;
1297    
1298     /*@LOG PWR_DcdcON ...*/
1299     LU_INFN_LOG(LU_DEBUG_TRACE,LU_MASK(__FILEID__),__FILEID__,__LINE__,PRH_VAR_POWER_MODE);
1300    
1301     switch(PRH_VAR_POWER_MODE){
1302     case PWRMODE_HOT:
1303     status = PWR_SendTC_PS(TM_PS_HOT);
1304     if(status == CM_RC_SUCCESSFUL) {
1305     status = HK_KHB_SetHotCold(CM_HOT);
1306     if (status == CM_RC_SUCCESSFUL)
1307     {
1308     status = PWR_InitBoard_twice();
1309     if(status == CM_RC_SUCCESSFUL)
1310     {
1311     status = PWR_SendTC_PS(TM_PS_RESET);
1312     if(status == CM_RC_SUCCESSFUL) {
1313     status=PWR_CalFe57(FALSE);
1314     if (status == CM_RC_SUCCESSFUL)
1315     {
1316     // Setting Parameters for HOT MODE
1317     PRH_VAR_TB_LINK=1; //HOT
1318     }
1319     }
1320     }
1321     }
1322     }
1323     if(status!=CM_RC_SUCCESSFUL) {
1324     /*@LOG PWR_DcdcON - PWRMODE_HOT : - status */
1325     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1326     status=CM_RC_DO_POWER_OFF_ON;
1327     }
1328     break;
1329     case PWRMODE_COLD:
1330     status = PWR_SendTC_PS(TM_PS_HOT);
1331     if (status == CM_RC_SUCCESSFUL)
1332     {
1333     status = PWR_SendTC_PS(TM_PS_COLD);
1334     if (status == CM_RC_SUCCESSFUL)
1335     {
1336     status = HK_KHB_SetHotCold(CM_COLD);
1337     if (status == CM_RC_SUCCESSFUL)
1338     {
1339     status = PWR_InitBoard_twice();
1340     if(status == CM_RC_SUCCESSFUL)
1341     {
1342     status = PWR_SendTC_PS(TM_PS_RESET);
1343     if (status == CM_RC_SUCCESSFUL) {
1344     status=PWR_CalFe57(FALSE);
1345     if (status == CM_RC_SUCCESSFUL)
1346     {
1347     status=PWR_PSBforTOFSetting(TRUE);
1348     PRH_VAR_TB_LINK=2; //COLD
1349     }
1350     }
1351     }
1352     }
1353     }
1354     }
1355     if(status!=CM_RC_SUCCESSFUL) {
1356     /*@LOG PWR_DcdcON - PWRMODE_COLD : - status */
1357     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1358     status=CM_RC_DO_POWER_OFF_ON;
1359     }
1360     break;
1361     default:
1362     // CUSTOM
1363     status = PWR_HLSetting();
1364     if (status == CM_RC_SUCCESSFUL)
1365     {
1366     status = PWR_InitBoard_twice();
1367     if (status == CM_RC_SUCCESSFUL)
1368     {
1369     status = PWR_SendTC_PS(TM_PS_RESET);
1370     if(status == CM_RC_SUCCESSFUL) {
1371     PWR_PSBforTOFSetting(FALSE);
1372     status = PWR_PSBSetting();
1373     if (status == CM_RC_SUCCESSFUL)
1374     {
1375     status= PWR_CalFe57(TRUE);
1376     PRH_VAR_TB_LINK=PRH_VAR_TB_LINK_CUSTOM; //CUSTOM
1377     }
1378     }
1379    
1380    
1381     }
1382     }
1383    
1384    
1385     if(status!=CM_RC_SUCCESSFUL) {
1386     /*@LOG PWR_DcdcON - PWRMODE_CUSTOM : - status */
1387     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1388     status=CM_RC_DO_POWER_OFF_ON;
1389     }
1390     break;
1391     }
1392     /*@LOG PWR_DcdcON end of function - status */
1393     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1394     return status;
1395     }
1396    
1397    
1398    
1399    
1400     status_code PWR_TRB_On()
1401     {
1402     status_code status;
1403    
1404     PWR_SwitchOff_IPM(PWR_IPM_34);
1405    
1406     OS_piTaskSuspend(PRH_VAR_PSB_TRB_BIAS_WAIT);
1407    
1408     status = PWR_TRBSetting(0x0003); // ALL OFF
1409     /*@LOG TRB Setting 0x0003 All Off - status */
1410     LU_INFN_LOG (LU_DEBUG_TRACE|LU_HA, LU_MASK(__FILEID__), __FILEID__, __LINE__, status);
1411     if(status == CM_RC_SUCCESSFUL) {
1412    
1413     if(PWR_ipm_hot_cold[PWR_IPM_34] == CM_HOT)
1414     PWR_SwitchOn_IPM(PWR_IPM_3);
1415     else
1416     PWR_SwitchOn_IPM(PWR_IPM_4);
1417    
1418     OS_piTaskSuspend(PRH_VAR_PSB_TRB_BIAS_WAIT);
1419     status = PWR_TRBSetting(0x3BBB); // BIAS OFF
1420     /*@LOG TRB Setting 0x3BBB Bias Off - status */
1421     LU_INFN_LOG (LU_DEBUG_TRACE|LU_HA, LU_MASK(__FILEID__), __FILEID__, __LINE__, status);
1422     if(status == CM_RC_SUCCESSFUL) {
1423     OS_piTaskSuspend(PRH_VAR_PSB_TRB_BIAS_WAIT);
1424     status = PWR_TRBSetting(0x3FFF); // ALL ON
1425     /*@LOG TRB Setting 0x3FFF All On - status */
1426     LU_INFN_LOG (LU_DEBUG_TRACE|LU_HA, LU_MASK(__FILEID__), __FILEID__, __LINE__, status);
1427     }
1428     }
1429     /*@LOG PWR_TrbOn end of function - status */
1430     LU_INFN_LOG(LU_DEBUG_TRACE|LU_HA,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
1431     return status;
1432     }

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