/[PAMELA software]/quicklook/dataToXML/Data/compilationInfo/src/FileManager/MMSUManager/FT_MMSUManager_op.c
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Revision 1.1 - (hide annotations) (download)
Tue Apr 25 09:00:20 2006 UTC (19 years, 2 months ago) by kusanagi
Branch point for: MAIN
File MIME type: text/plain
Initial revision

1 kusanagi 1.1 /****************************************************************************
2     /* F i l e D a t a
3     /*
4     /* Module : FileManager
5     /* C.I. No. :
6     /* $Revision: 1.18 $
7     /* $Date: 2005/03/20 18:17:45 $
8     /* Belonging to :
9     /* :
10     /* $RCSfile: FT_MMSUManager_op.c,v $
11     /* Program Type :
12     /* Sub-modules :
13     /*
14     /****************************************************************************
15     /* S W D e v e l o p m e n t E n v i r o n m e n t
16     /*
17     /* Host system :
18     /* SW Compiler :
19     /* $Author: sebastiani $
20     /* :
21     /****************************************************************************
22     /* U p d a t i n g
23     /*
24     /* $Log: FT_MMSUManager_op.c,v $
25     /* Revision 1.18 2005/03/20 18:17:45 sebastiani
26     /* PRH_VAR_TIM_MMSU_DMA_DELAY cancelled
27     /*
28     /* Revision 1.17 2005/03/06 14:54:16 sebastiani
29     /* fix log
30     /*
31     /* Revision 1.16 2005/02/21 08:58:28 sebastiani
32     /* all log comments completed
33     /*
34     /* Revision 1.15 2005/01/26 18:46:28 sebastiani
35     /* *** empty log message ***
36     /*
37     /* Revision 1.14 2004/09/09 14:50:41 sebastiani
38     /* add debug output console
39     /*
40     /* Revision 1.13 2004/08/26 16:54:07 sebastiani
41     /* fix some bug
42     /*
43     /* Revision 1.12 2004/06/30 07:26:24 sebastiani
44     /* *** empty log message ***
45     /*
46     /* Revision 1.11 2004/06/15 08:13:28 sebastiani
47     /* FT_opPendingSaveRequests introduced
48     /*
49     /* Revision 1.10 2004/05/20 09:04:06 sebastiani
50     /* ok
51     /*
52     /* Revision 1.9 2004/05/19 08:44:25 sebastiani
53     /* fix bug
54     /*
55     /* Revision 1.8 2004/03/03 11:23:43 tassa
56     /* Start downlink manager by timer+message
57     /*
58     /* Revision 1.7 2003/11/10 12:21:11 sebastiani
59     /* FS_piInitFileSystem() not invoked any more inside the FT_opChangeOpMode. This fixes the bug that reinitialized the Mass Memory at every change to active/maintenance
60     /*
61     /* Revision 1.6 2003/10/21 16:09:12 alfarano
62     /* LU_LOG_INFN replacement for all remaining original log functions
63     /*
64     /* Revision 1.5 2003/10/17 08:25:48 sebastiani
65     /* FILE1 bugfixes,
66     /* downlink various bugfixes, VRL switch on/off introduced,
67     /* FT_ifStopDownLink_CallBack function introduced,
68     /* "case" FT_STOP_DOWNLINK introduced for the MSSUManager task
69     /*
70     /* Revision 1.4 2003/09/10 13:44:00 laben
71     /* New File System model: just one file used like a circular buffer.
72     /* NEw donwlink procedure: downlink next sector until the timer expires.
73     /*
74     /* Revision 1.3 2003/08/27 09:49:17 wizard
75     /* Fix last sector in donwload.
76     /* Set Sector size to 1024*1015
77     /* Fix Donwload procedure... ( set size set lastsector flag.....)
78     /* bye
79     /*
80     /* Revision 1.2 2003/08/07 08:44:14 wizard
81     /* SIMULATOR bugs ifdef/ifndef corrected
82     /* laben bug "GetFileInfo" for FS_ERC32 id accepted in order to fix SM_pi_GetPacket
83     /*
84     /* Revision 1.1.1.1 2003/08/04 09:40:21 sebastiani
85     /* Imported sources laben rel. 19.06.2003 integrated with pam2
86     /*
87     /* Revision 1.15 2003/06/09 10:23:22 aurora
88     /* improved the management of data acquisition
89     /*
90     /* Revision 1.14 2003/05/06 15:43:28 aurora
91     /* deleted the check of CMD I/F register on ISR WriteEOT.
92     /* The transfer on CMD I/F doesn't rise any interrupt
93     /*
94     /* Revision 1.13 2003/04/11 08:24:55 aurora
95     /* Fixed Memory Module TEST
96     /*
97     /* Revision 1.12 2003/03/12 10:53:49 aurora
98     /* the channel for write on CMD is unlocked immediately after send
99     /*
100     /* Revision 1.11 2003/01/22 13:58:04 aurora
101     /* removed bug in WriteEOT ISR
102     /*
103     /* Revision 1.10 2002/10/17 10:05:18 zulia
104     /* fixed ON/OFF memory module
105     /* optimised PIFReset
106     /*
107     /* Revision 1.9 2002/07/31 14:27:00 zulia
108     /* Correct EXE_MEM_CONF and init memory module
109     /*
110     /* Revision 1.8 2002/05/09 13:44:26 aurora
111     /* Column latchup recovery updated
112     /*
113     /* Revision 1.7 2002/05/09 08:16:34 zulia
114     /* * acceptance release
115     /*
116     /*
117     /*****************************************************************************/
118    
119    
120     /*============================= Include File ================================*/
121    
122    
123     #include <src/INFN/LU_SourceFileID_INFN.h>
124     #define __FILEID__ _FT_MMSUManager_op__c
125     #include <src/INFN/PRH_ParamHandler_INFN.h>
126     #include <src/INFN/LU_LogUtility_INFN.h>
127     #include <src/INFN/PRH_ParamHandler_INFN_auto.h>
128     LU_DECL_MASK();
129    
130    
131     #include <src/FileManager/MMSUManager/FT_MMSUManager_op.h>
132     #include <src/FileManager/MMSUManager/FT_MMSUManager_int.h>
133     #include <src/TM_TCManager/TMTCManager/TM_TMTCManager_p.h>
134     #include <src/INFN/LU_LogUtility_INFN.h>
135     #include <src/INFN/MH_ModeHandler_INFN.h>
136    
137     /*============================== local define ===============================*/
138    
139     #define WPBEOT ERC32_INTERRUPT_EXTERNAL_4
140     #define RPBEOT ERC32_INTERRUPT_EXTERNAL_3
141    
142     /*****************************************************************************/
143     /*======================== Object internal structure ========================*/
144     /*****************************************************************************/
145    
146     /*======================== Object Internal variables ========================*/
147    
148     /*****************************************************************************/
149     /* @Constant: FT_MemModTestDef */
150     /* @Purpose : */
151     /* Array of FT_MOD_TEST structures. */
152     /* Test pattern. */
153     /* @@ */
154     /*****************************************************************************/
155     const FT_MOD_TEST FT_MemModTestDef[]={
156     {FT_TEST_PATTERN_EN,FT_TEST_PATTERN_VAR,0x0000,FT_TEST_MOD_NOT_PERFORMED,0x0000},
157     {FT_TEST_PATTERN_EN,FT_TEST_PATTERN_FIX,0xaaaa,FT_TEST_MOD_NOT_PERFORMED,0x0000},
158     {FT_TEST_PATTERN_EN,FT_TEST_PATTERN_FIX,0x5555,FT_TEST_MOD_NOT_PERFORMED,0x0000},
159     {FT_TEST_PATTERN_EN,FT_TEST_PATTERN_FIX,0xffff,FT_TEST_MOD_NOT_PERFORMED,0x0000},
160     {FT_TEST_PATTERN_EN,FT_TEST_PATTERN_FIX,0x0000,FT_TEST_MOD_NOT_PERFORMED,0x0000}};
161    
162    
163    
164     /*****************************************************************************/
165     /* @Variable: FT_MMSUStatus */
166     /* @Purpose : */
167     /* FT_ALL_MMSU_STATUS structure */
168     /* MMSU Local and Remote hardware status. */
169     /* @@ */
170     /*****************************************************************************/
171     static FT_MMSU_STATUS FT_MMSUStatus;
172    
173     /*****************************************************************************/
174     /* @Variable: FT_TestModuleStatus */
175     /* @Purpose : */
176     /* FT_TEST_MOD_STATUS structure */
177     /* Memory Module test status. */
178     /* @@ */
179     /*****************************************************************************/
180     static FT_TEST_MOD_STATUS FT_TestModuleStatus;
181    
182     /*****************************************************************************/
183     /* @Variable: FT_RWChannel */
184     /* @Purpose : */
185     /* FT_TEST_MOD_STATUS structure */
186     /* Info about the read channel: downlink status, file to be downlinked ... */
187     /* Info about the write channel: write enable/disable, store in progress ..*/
188     /* @@ */
189     /*****************************************************************************/
190     static FT_RW_CH FT_RWChannel;
191    
192     // XXXDEBUG MASSIMO BEGIN -------------------------------------------------------------------------------------------------------------------
193     // task a cui mandare la notifica di fine DOWNLOAD
194    
195     static UINT32 FT_task2notify_EOD;
196    
197     // XXXDEBUG MASSIMO END -------------------------------------------------------------------------------------------------------------------
198    
199     /*****************************************************************************/
200    
201     /*==== M M S U M a n a g e r O P E R A T I O N A L F U N C T I O N S ====*/
202    
203     /*****************************************************************************/
204     /* @Function: FT_opInitMMSUManager */
205     /* @Purpose : */
206     /* The function initializes the MMSUManager object. The OS directive are */
207     /* called to set priority and to ready the MMSUManager task. */
208     /* The function also performs the following initializations: */
209     /* - PSCU status initalization */
210     /* - MMSU test running initialization */
211     /* - Last Bite filler word initialization */
212     /* */
213     /* @@ */
214     /* @Parameter Name @Mode @Description */
215     /* status_code OUT Return code */
216     /* @@ */
217     /*****************************************************************************/
218    
219     status_code FT_opInitMMSUManager (void)
220     {
221     status_code status;
222     unsigned int OldPriority;
223     unsigned int i,c;
224    
225     status =SUCCESSFUL;
226    
227     /* Task initialization */
228     if (OS_piTaskReady(FT_TASK,FT_tkMMSUManager) != SUCCESSFUL)
229     {
230     /* Task is not correctly started */
231     /*@LOG LOG_INFN HA_piLogHistoryEntry10(HA_E10_SW_FT,HA_E10_TSK_READY_ERR,status); */
232     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
233     status =UNSATISFIED;
234     }
235     if (OS_piTaskPriority(FT_TASK,MMSU_PRIORITY,&OldPriority) != SUCCESSFUL)
236     {
237     /* Task priority is not correctly updated */
238     /*@LOG LOG_INFN HA_piLogHistoryEntry10(HA_E10_SW_FT,HA_E10_TSK_PRIORITY_ERR,status); */
239     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,status);
240     status =UNSATISFIED;
241     }
242    
243    
244     /* DSHA status initalization */
245     FT_ifMMSUStatusInit(&FT_MMSUStatus,(void*)&FT_MemModTestDef[0]);
246    
247     /* MMSU test running initialization */
248     FT_TestModuleStatus.State =FT_TEST_NO_RUNNING;
249     FT_TestModuleStatus.Module =0xffffffff; /* No Module index */
250     FT_TestModuleStatus.TestIdx =0xffffffff; /* No Pattern index */
251    
252     /* Init the RWChannel */
253     FT_ifRWChannelInit(&FT_RWChannel,
254     FT_MEM_MOD_1,
255     &FT_MMSUStatus.Module[FT_MEM_MOD_1]);
256     FT_RWChannel.CMDWriteFail = 0;
257    
258     return (status);
259     }
260    
261    
262    
263     /*****************************************************************************/
264     /* @Function: FT_opSndMsgMMSUManager */
265     /* @Purpose : */
266     /* The function invokes the directive of the OS to send a message to the */
267     /* MMSUManager mailbox. */
268     /* */
269     /* @@ */
270     /* @Parameter Name @Mode @Description */
271     /* SndMsg IN Pointer to the message task information */
272     /* (MsgTsk type) */
273     /* status_code OUT Return code */
274     /* @@ */
275     /*****************************************************************************/
276    
277     status_code FT_opSndMsgMMSUManager(MsgTsk* SndMsg)
278     {
279     status_code status;
280    
281     /* Call the OS directive to put a message into the task mailbox */
282     status =OS_piMsgQueueSend(FT_MAILBOX,SndMsg,sizeof(MsgTsk));
283     return (status);
284    
285     }
286    
287    
288    
289     /*****************************************************************************/
290     /* @Function: FT_tkMMSUManager */
291     /* @Purpose : */
292     /* The function is the task handler of the MMSUManager object. */
293     /* When a message is received into task mailbox it wakes up. */
294     /* The information contained in the message (MsgTsk structure) define */
295     /* parameters (Info field), and the operation type that the task performs */
296     /* (Code field). */
297     /* The MMSUManager task activity is to manage the MMSU operations. */
298     /* The operations performed by task are: */
299     /* */
300     /* @@ */
301     /* @Parameter Name @Mode @Description */
302     /* @@ */
303     /*****************************************************************************/
304    
305     task FT_tkMMSUManager (task_argument unused)
306     {
307     MsgTsk RxMsg;
308     unsigned int MsgSize;
309     FT_SAVEREQUEST saveReq;
310     unsigned int reqSize;
311    
312     while( FOREVER )
313     {
314     RxMsg.Code =NULL_MSG_FT;
315     /* Wait for a message to become available */
316     if ((OS_piMsgQueueReceive (FT_MAILBOX,(void*)&RxMsg,
317     &MsgSize,NO_WAIT, 0)) == SUCCESSFUL)
318     {
319     /*@LOG MMSUManager Task: operation code received */
320     LU_INFN_LOG(LU_DEBUG_TRACE,LU_MASK(__FILEID__),__FILEID__,__LINE__,RxMsg.Code);
321     switch (RxMsg.Code)
322     {
323     case FT_MCMD_DOWN_LINK : /*=== MCMD DOWN LINK management */
324     FT_ifMCMDDownLinkExec((MA_HEADER_MCMD*)RxMsg.Info,
325     &FT_RWChannel);
326     break;
327     case FT_MCMD_BITE : /*=== MCMD BITE management */
328     FT_ifMCMDBiteExec((MA_HEADER_MCMD*)RxMsg.Info,
329     &FT_MMSUStatus,
330     &FT_TestModuleStatus,
331     &FT_RWChannel);
332     break;
333     case FT_STOP_DOWNLINK:
334     FT_ifStopDownLink(&FT_RWChannel);
335     break;
336     case FT_START_DOWNLINK:
337     FT_ifStartDownLink(&FT_RWChannel);
338     break;
339     case FT_ABORT : /*=== MCMD ABORT management */
340     FT_ifMCMDAbordExec((MA_HEADER_MCMD*)RxMsg.Info,
341     &FT_RWChannel,
342     &FT_TestModuleStatus);
343     break;
344     case FT_MCMD_EXE_MEM_CONF :/*=== MCMD MEMERY.CONF.management */
345     FT_ifMCMDExeMemConf((MA_HEADER_MCMD*)RxMsg.Info,
346     &FT_MMSUStatus, &FT_RWChannel);
347     break;
348     case FT_MEM_MODULE_TEST :/*=== Mem. Module TEST management */
349     FT_ifMemModuleTestExec(&FT_MMSUStatus,
350     &FT_TestModuleStatus,
351     (void*)&FT_MemModTestDef[0]);
352     break;
353     case FT_TEST_MODULE_END:/*=== End TEST module menagement */
354     FT_ifTestModuleEnd(*(unsigned int*)RxMsg.Info,
355     &FT_MMSUStatus,
356     &FT_TestModuleStatus);
357     break;
358     case FT_LATCHUP_RECOVERY:/*=== LatchUp recovery management */
359     FT_ifLatchUpRecovery(*(unsigned int*)RxMsg.Info,
360     &FT_MMSUStatus, &FT_RWChannel);
361     break;
362     case FT_HW_ERROR_RECOVERY :/*=== HW error recovery management*/
363     FT_ifHwErrorRecovery(*(unsigned int*)RxMsg.Info,
364     &FT_MMSUStatus, &FT_RWChannel);
365     break;
366     case FT_INIT_FS:
367     FS_piInitFileSystem();
368     break;
369     default:
370     break;
371     };
372     }
373    
374     if ( (OS_piMsgQueueReceive (SAVE_MBOX, &saveReq,
375     &reqSize, WAIT, 20) == SUCCESSFUL))
376     {
377     /* write pending save request on Memory Module */
378     FT_opPacket2MMSU (saveReq);
379     }
380     }
381     }
382    
383    
384     /*****************************************************************************/
385     /* @Function: FT_opMemBoardMod */
386     /* @Purpose : */
387     /* The function handles the Memory Module interrupt raised by the DRAMMA */
388     /* device due to an internal failure. The -MemModule- parameter */
389     /* specify the MMSU and Memory Module where the failure is matched. */
390     /* Different kinds of failure are managed: */
391     /* - Hardware OR and AND erorr. A message to MMSUManager is sent to */
392     /* manage HW error recovery. */
393     /* - Scrabbing Adrres Overflow error. This interrrupt normally disabled,*/
394     /* it is enabled only during the procedure of Memory Module scrabbing */
395     /* used in the Test or Bite operation. This interrupt goes active */
396     /* every time the scubber completes a cycle on the whole memory. */
397     /* At this time if the Bite operations are active, the Bite Down Link */
398     /* procedure is started. Otherwise if Memory Module Test operations */
399     /* are active is started the next Memory Module test. */
400     /* - Latch UP Monitor error. When this interrupt goes active, means */
401     /* that one or more columns of the memory have gone in Latch Up mode. */
402     /* The task invoked by the interrupt handler will provide to execute */
403     /* the Latch Up recovery procedure. */
404     /* */
405     /* @@ */
406     /* @Parameter Name @Mode @Description */
407     /* MemModule IN Memory Module (FT_MEMORY_MODULE type) */
408     /* status_code OUT Return code */
409     /* @@ */
410     /*****************************************************************************/
411    
412     status_code FT_opMemBoardMod (unsigned int MemModule)
413     {
414     #ifndef SIMULATOR
415     status_code status;
416     unsigned int pendingInt;
417     unsigned int latchupBit;
418     FT_MEM_MOD* pMemMod;
419     unsigned int hwErr;
420     unsigned int ch;
421    
422     /* Check parameters */
423     pMemMod =&FT_MMSUStatus.Module[MemModule];
424    
425     /* Read all memory module interrupts */
426     FD_piDrammaRdRPBUSReg(MemModule,FD_PENDING_INT,&pendingInt);
427     pendingInt =FD_MM_INTER_BIT(pendingInt);
428    
429     /* Check Memory Module interrupts */
430     if ((pendingInt & FD_MM_INT_HW_OR) || (pendingInt & FD_MM_INT_HW_AND))
431     {
432     /*====== Hardware OR and AND erorr =============*/
433     /* Mask all memory module interrupts */
434     FD_piDrammaWrWPBUSReg(MemModule,FD_INTMSK,FD_MM_INT_ALL);
435     /* Read Hard Error Register */
436     FD_piDrammaRdRPBUSReg(MemModule,FD_HARD_ERROR_REG,&hwErr);
437     /* HW error rocovery menagement */
438     FT_ifHwErrorInter(MemModule);
439     /*======== Entry 11 Log in History Area ========*/
440     /*@LOG LOG_INFN HA_piLogHistoryEntry11(HA_E11_MEMORY_MODULE, HA_E11_MOD_INT_HW_ERR,MemModule, hwErr); */
441     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,hwErr);
442     }
443    
444     if (pendingInt & FD_MM_INT_SW_OVL)
445     {
446     /*====== Software Overflow error ===============*/
447     }
448    
449     if (pendingInt & FD_MM_INT_SA_OVL)
450     {
451     OS_piCancelTimer(FT_TIM);
452     /*====== Scrabbing Adrres Overflow error =========*/
453     /* This function checks if Module is in TEST mode,*/
454     /* if is it Test Module procedure is managed */
455     FT_ifMemModuleTestInter (&FT_MMSUStatus,&FT_TestModuleStatus);
456     /* Check if Module is in BITE mode */
457     if (pMemMod->Mode==FT_MODE_MEM_MOD_BITE)
458     {
459     /*========= Entry 0 Log in History Area ==========*/
460     /*@LOG LOG_INFN HA_piLogHistoryEntry0(HA_E0_EXITING,HA_E0_BITE,0); */
461     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,0);
462     /* Check if memory fill is OK */
463     if (pMemMod->State==FT_STATE_MOD_OK)
464     {
465     /* Interrupt unmask: LATCHUP_MONITOR,HW_OR,HW_AND */
466     /* Interrupt masked: SA_OVL ,SFT_OVL */
467     FD_piDrammaWrWPBUSReg(MemModule,FD_INTMSK,FD_MM_INT_ABIL_ALL);
468     /* Memory fill OK */
469     /* Start Down Link procedure */
470     pMemMod->Mode = FT_MODE_MEM_MOD_ON;
471     }
472     else
473     {
474     /* Memory fill not OK */
475     /* Close BITE operative mode */
476     pMemMod->Mode = FT_MODE_MEM_MOD_ON;
477     }
478     }
479     }
480    
481     if (pendingInt & FD_MM_INT_LM_C_ALL)
482     {
483     /*=========== Latch UP Monitor error =============*/
484     FT_ifColLatchUpInter(MemModule,FD_MM_LTATCHUP_BIT(pendingInt));
485     /*======== Entry 11 Log in History Area ========*/
486     /*@LOG LOG_INFN HA_piLogHistoryEntry11(HA_E11_MEMORY_MODULE, HA_E11_MOD_INT_LATCHUP,MemModule, pendingInt); */
487     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,pendingInt);
488     }
489    
490     /* Clear all Memory Module interrupts */
491     FD_piDrammaWrWPBUSReg(MemModule,FD_INTCLR,FD_MM_INT_ALL);
492     #endif // SIMULATOR
493     return (SUCCESSFUL);
494     }
495    
496    
497    
498    
499    
500    
501     /*****************************************************************************/
502     /* @Function: FT_opMemModuleON */
503     /* @Purpose : */
504     /* The function switches ON a Memory Module. */
505     /* The -MemModule- parameter specifies the Memory Module that must be */
506     /* switched ON. */
507     /* The Memory Module will be switched ON if module is OFF and his state is */
508     /* OK. The procedure to switch ON the 10 colums (8 columns date, 2 CRC */
509     /* columns) of th module is the following: */
510     /* - Clear and mask all Memory Module interrupts. */
511     /* - Program Dramma SCRUBBING and REFRESH register. */
512     /* - Switch ON the 10 columns programming ON a column at a time in */
513     /* the CONFIGURATION Register. One ms of delay is executed before */
514     /* activate the next column. */
515     /* - Check possible Latch Up monitor errors. */
516     /* - If Latch Up errors are found the recovery procedure is executed */
517     /* - If Memory Module switching is OK, a power-up memory sequence is */
518     /* started programmming DRAMMA INIT Register. Memory Module sectors */
519     /* are inserted into FAT. */
520     /* - Else Memory Module is put OFF and his state in FAIL. */
521     /* - Unmask all memory module interrupts. */
522     /* */
523     /* @@ */
524     /* @Parameter Name @Mode @Description */
525     /* MemModule IN Memory Module (FT_MEMORY_MODULE type) */
526     /* status_code OUT Return code */
527     /* @@ */
528     /*****************************************************************************/
529    
530     status_code FT_opMemModuleON (unsigned int MemModule)
531     {
532     #ifndef SIMULATOR
533     status_code status;
534     unsigned int retCode;
535     FT_MEM_MOD* pMod;
536     FT_MEM_MOD mod;
537     unsigned int configRegVal;
538     unsigned int memModule;
539     unsigned int maskCol;
540     unsigned int pendingVal;
541     unsigned int colLatchup;
542     unsigned int colEnable;
543     unsigned int colError;
544     unsigned int colOn;
545     unsigned int i;
546    
547     /* Check parameters */
548     memModule =MemModule & FD_BOARD_ADDR_MASK;
549    
550     /* Get module pointer of the MMSU status structure */
551     pMod =&FT_MMSUStatus.Module[memModule];
552     /* Assign the Memory Module status structure to the local structure */
553     mod = *pMod;
554     if (pMod->Mode==FT_MODE_MEM_MOD_OFF)
555     {
556     /* Memory Module OFF, try to switch ON */
557     status =FT_MEM_MOD_SW_ON_OK;
558     /* Clear all Memory Module interrupts */
559     FD_piDrammaWrWPBUSReg (memModule,FD_INTCLR,FD_MM_INT_ALL);
560     /* Mask all Memory Module interrupts */
561     FD_piDrammaWrWPBUSReg (memModule,FD_INTMSK,FD_MM_INT_ALL);
562     /* Set Dramma SCRUBBING and REFRESH register */
563     FD_piDrammaWrWPBUSReg (memModule,FD_SCRUBBER_REFRESH,FD_SCRABBER_REFRESH_VALUE);
564    
565     /* Active the 10 Columns writing a CONFIGURATION REGISTER */
566     configRegVal =FD_CONFIG_REG_27_11_B | (MemModule << 22);
567     for (i=0, maskCol =FD_CONFIG_REG_COL_01; i<FD_MAX_COLUMN_ENABLE; i++,maskCol <<=1)
568     {
569     /* Column ON */
570     configRegVal |=maskCol;
571     FD_piDrammaWrWPBUSReg (memModule,FD_CONFIGURATION,configRegVal);
572     /* Program Latchup Retry counter 3 ms */
573     FD_piDrammaWrWPBUSReg (memModule,FD_LATCH_UP_RETRY,FD_LATCHUP_RETRY_VAL);
574    
575     mod.Column[i] =FT_COLUMN_ON;
576     /* Wait 6 ms before to activate the next column */
577     OS_piTaskSuspend (7);
578     }
579     /* Check Latch Up monitor interrupts */
580     FD_piDrammaRdRPBUSReg (memModule,FD_PENDING_INT,&pendingVal);
581     /* Take only the Latch Up bits */
582     colLatchup =FD_MM_LTATCHUP_BIT(pendingVal);
583     /* Check if there are columns in Latch Up condition */
584     if (colLatchup)
585     {
586     /*========== Column Latch Up recovery procedure ==========*/
587     /* Clear all memory module interrupts */
588     FD_piDrammaWrWPBUSReg (memModule,FD_INTCLR,FD_MM_INT_ALL);
589     /* Try to activate the columns in Latch Up */
590     retCode =FT_ifColumnLatchUp(memModule,configRegVal,
591     colLatchup,FALSE,&colError,&pendingVal);
592     /* Check if there are Column in error */
593     if (retCode==SUCCESSFUL && colError)
594     {
595     /* There is 1 column error, try to use Spare column */
596    
597     /* Column in fail OFF */
598     configRegVal &=~colError;
599     FD_piDrammaWrWPBUSReg (MemModule,FD_CONFIGURATION,configRegVal);
600     /* Column spare switched ON */
601     configRegVal |=FD_CONFIG_REG_COL_11;
602     /* Program Latchup Retry counter 3 ms */
603     FD_piDrammaWrWPBUSReg (memModule,FD_LATCH_UP_RETRY,FD_LATCHUP_RETRY_VAL);
604     /* Column ON */
605     FD_piDrammaWrWPBUSReg (memModule,FD_CONFIGURATION,configRegVal);
606     mod.Column[FT_SPARE_COL] =FT_COLUMN_ON;
607     /* Wait 6 ms */
608     OS_piTaskSuspend (7);
609     /* Check if Spare column is in Latch Up */
610     FD_piDrammaRdRPBUSReg (memModule,FD_PENDING_INT,&pendingVal);
611     colLatchup =FD_MM_LTATCHUP_BIT(pendingVal);
612     if (colLatchup)
613     {
614     /*======= Column Latch Up recovery procedure =======*/
615     /* Clear all memory module interrupts */
616     FD_piDrammaWrWPBUSReg (memModule, FD_INTCLR, FD_MM_INT_ALL);
617     retCode =FT_ifColumnLatchUp(memModule,configRegVal,FD_CONFIG_REG_COL_11,
618     FALSE,&colError,&pendingVal);
619     if (colError)
620     {
621     /* The Spare column is still in Latch Up */
622     status =FT_MEM_MOD_SW_ON_ERROR;
623     mod.Column[FT_SPARE_COL] =FT_COLUMN_FAIL;
624     }
625     }
626     }
627     else if (retCode!=SUCCESSFUL)
628     {
629     status =FT_MEM_MOD_SW_ON_ERROR;
630     }
631     }
632    
633     if(status==FT_MEM_MOD_SW_ON_OK)
634     {
635     /*=========== Column not in Latch Up condition ===========*/
636     /* Check if all 10 columns have been enabled */
637     /* Take columns enabled */
638     colEnable =FD_COLUMN_ENABLE(pendingVal);
639     for (i=0,colOn=0,maskCol=1; i<FD_MAX_COLUMNS; i++,maskCol <<=1)
640     {
641     if (colEnable & maskCol)
642     {
643     colOn++;
644     }
645     }
646     if (colOn == FD_MAX_COLUMN_ENABLE)
647     {
648     /* Start a Memory Module operation and fill all 0 the memory */
649     FD_piDrammaWrWPBUSReg (memModule,FD_INITREG,FD_INITREG_MODULE_INIT);
650     /* Wait 2 ms,time necessary to complete the start operations */
651     OS_piTaskSuspend (2);
652     mod.State =FT_STATE_MOD_OK;
653     mod.Mode =FT_MODE_MEM_MOD_ON;
654     }
655     else
656     {
657     /* The columns are not correctly switched on */
658     status =FT_MEM_MOD_SW_ON_ERROR;
659     }
660     }
661     if (status == FT_MEM_MOD_SW_ON_ERROR)
662     {
663     /* Memory Module switched OFF */
664     FT_opMemModuleOFF(memModule);
665     mod.State =FT_STATE_MOD_FAIL;
666     mod.Mode =FT_MODE_MEM_MOD_OFF;
667    
668     /*============= Entry 11 Log in History Area ===============*/
669     /*@LOG LOG_INFN HA_piLogHistoryEntry11(HA_E11_MEMORY_MODULE, HA_E11_MOD_ON_ERR,MemModule, colError); */
670     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,colError);
671     }
672    
673     /* Assign the Memory Module state */
674     *pMod =mod;
675     /* Unmask all memory module interrupts */
676     FD_piDrammaWrWPBUSReg (memModule,FD_INTMSK,FD_MM_INT_ABIL_ALL);
677     }
678     else
679     {
680     /* Memory Module already ON, or in fail */
681     status =(pMod->State==FT_STATE_MOD_OK) ? FT_MEM_MOD_ALREADY_ON:
682     FT_MEM_MOD_STATE_FAIL;
683     }
684    
685     return (status);
686     #else
687     return SUCCESSFUL;
688     #endif // SIMULATOR
689     }
690    
691    
692    
693     /*****************************************************************************/
694     /* @Function: FT_opMemModuleOFF */
695     /* @Purpose : */
696     /* The function switches OFF a Memory Module. */
697     /* The -MemModule- parameter specifies the Memory Module that */
698     /* must be switched OFF. */
699     /* The procedure to switch OFF all columns is the following: */
700     /* - Clear and mask all Memory Module interrupts. */
701     /* - Switch OFF all columns programming OFF a column at a time in */
702     /* the CONFIGURATION Register. One ms of delay is executed before */
703     /* activate the next column. */
704     /* - Unmask all memory module interrupts. */
705     /* */
706     /* @@ */
707     /* @Parameter Name @Mode @Description */
708     /* MemModule IN Memory Module (FT_MEMORY_MODULE type) */
709     /* status_code OUT Return code */
710     /* @@ */
711     /*****************************************************************************/
712    
713     status_code FT_opMemModuleOFF (unsigned int MemModule)
714     {
715     #ifndef SIMULATOR
716     status_code status;
717     unsigned int memModule;
718     FT_MEM_MOD* pMod;
719     FT_MEM_MOD mod;
720     unsigned int configRegVal;
721     unsigned int pendingVal;
722     unsigned int maskCol;
723     unsigned int i;
724    
725     /* Check parameters */
726     memModule =MemModule & FD_BOARD_ADDR_MASK;
727    
728     /* Initialization local variable */
729     pMod =&FT_MMSUStatus.Module[memModule];
730    
731     /* Assign the Memory Module status structure to the */
732     /* local variable */
733     mod = *pMod;
734     for (i=0; i<FD_MAX_COLUMNS; i++)
735     {
736     mod.Column[i] =FT_COLUMN_OFF;
737     }
738     mod.State =pMod->State; /* Maintain the old state */
739     mod.Mode =FT_MODE_MEM_MOD_OFF;
740    
741     /* Program Dramma REINT register */
742     FD_piDrammaWrWPBUSReg(MemModule,FD_REINIT,0);
743     /* Mask all Memory Module interrupts */
744     FD_piDrammaWrWPBUSReg(MemModule,FD_INTMSK,FD_MM_INT_ALL);
745     /* Get Columns enabled (Bit 16..24) */
746     FD_piDrammaRdRPBUSReg (memModule,FD_PENDING_INT,&pendingVal);
747     /* Memory Module switched OFF */
748     configRegVal =FD_CONFIG_REG_27_11_B | (MemModule << 22);
749     configRegVal =FD_CONFIG_REG_27_11_B | FD_COLUMN_ENABLE(pendingVal);
750     for (i=0,maskCol =FD_CONFIG_REG_COL_01 ;i<FD_MAX_COLUMNS; i++,maskCol <<=1)
751     {
752     /* Column OFF */
753     configRegVal &=(~maskCol);
754     FD_piDrammaWrWPBUSReg(MemModule,FD_CONFIGURATION,configRegVal);
755     /* Wait 2 ms before to activate the next column */
756     OS_piTaskSuspend (2);
757     }
758     /* Assign the Memory Module state */
759     *pMod =mod;
760     #endif // SIMULATOR
761    
762     return (FT_MEM_MOD_SW_OFF_OK);
763     }
764    
765     /*****************************************************************************/
766     /* @Function: FT_opSavePage */
767     /* @Purpose : */
768     /* This function store the selected SRAM page into the memory module. If a */
769     /* previous storage is in progress than the store request is saved in the */
770     /* store request queue. */
771     /* @@ */
772     /* @Parameter Name @Mode @Description */
773     /* PageId IN ID of the SRAM page to be saved */
774     /* PageInfo IN DAQ write result for the SRAM page */
775     /* FileId IN Destination file */
776     /* FT_SAVE_RESULT OUT Return code */
777     /* @@ */
778     /*****************************************************************************/
779    
780     FT_SAVE_RESULT FT_opSavePage(SM_PAGEID PageId, SD_DAQ_WRESULT PageInfo,
781     FS_FILEID FileId)
782     {
783     unsigned int intLevel;
784     FT_SAVE_RESULT status = FT_SUCCESS;
785     FT_SAVEREQUEST saveReq;
786    
787     /* Filter the save page requests base on the store channel status: */
788     /* FT_STR_NONE reject all the requests */
789     /* FT_STR_ALL accept all the requests */
790     /* FT_STR_CMD accept only save requests towards the CMD I/F */
791     if((FT_RWChannel.StoreEnable != FT_STR_NONE &&
792     (FT_RWChannel.StoreEnable == FT_STR_ALL ||
793     FileId == FS_CMD)) || FileId == FS_ERC32 )
794     {
795     /* Disable ISR that access the store queue data structures */
796     OS_piInterDisable(&intLevel);
797     SD_piMaskInt(SD_DATA_TO);
798     OS_piInterEnable(intLevel);
799    
800     saveReq.PageId = PageId;
801     saveReq.PageInfo = PageInfo;
802    
803     /* force the file id to FILE1 for synchronize both files */
804     // if (FileId == FS_HK)
805     // FileId = FS_FILE1;
806     saveReq.FileId = FileId;
807    
808     if(OS_piMsgQueueSend(SAVE_MBOX, &saveReq, sizeof(saveReq)) != SUCCESSFUL)
809     {
810     status = FT_TOOMANYREQUESTS;
811     }
812    
813     /* Re-enable ISR that access the store queue data structures */
814     OS_piInterDisable(&intLevel);
815     SD_piUnMaskInt(SD_DATA_TO);
816     OS_piInterEnable(intLevel);
817     }
818     else
819     status = FT_STOREDISABLED;
820    
821     return (status);
822     }
823    
824     /*****************************************************************************/
825     /* @Function: FT_opPendingSaveRequests */
826     /* @Purpose : */
827     /* This function returns the number of Save Request pending */
828     /* */
829     /* @@ */
830     /* @Parameter Name @Mode @Description */
831     /* @@ */
832     /*****************************************************************************/
833    
834     status_code FT_opPendingSaveRequests(UINT32* counter)
835     {
836     return OS_piMessageQueueGetNumberPending_INFN (SAVE_MBOX,
837     counter);
838     }
839    
840    
841     /*****************************************************************************/
842     /* @Function: FT_opGetCMDWErrorCounter */
843     /* @Purpose : */
844     /* This function returns the number of write errors towards the CMD I/F */
845     /* */
846     /* @@ */
847     /* @Parameter Name @Mode @Description */
848     /* @@ */
849     /*****************************************************************************/
850    
851     void FT_opGetCMDWErrorCounter(UINT32* Counter)
852     {
853     unsigned int intLevel;
854    
855     OS_piInterDisable(&intLevel);
856     *Counter = FT_RWChannel.CMDWriteFail;
857     OS_piInterEnable(intLevel);
858     }
859    
860     /*****************************************************************************/
861     /* @Function: FT_opWriteEOT */
862     /* @Purpose : */
863     /* This function is called by the WPBUS EOT interrupt and closes the store */
864     /* of a single SRAM page. If the save requests queue is not empty then the */
865     /* new SRAM page store is started */
866     /* @@ */
867     /* @Parameter Name @Mode @Description */
868     /* @@ */
869     /*****************************************************************************/
870    
871     void FT_opWriteEOT(void)
872     {
873     unsigned int intLevel;
874     UINT32 writeAddr;
875     UINT32 writeSize;
876     FT_SAVEREQUEST saveReq;
877     BOOL Done = FALSE;
878     UINT32 reqSize;
879     UINT32 algn;
880    
881     /* Clear the WEOT interrupt */
882    
883     SD_piClearInt(SD_WPB_EOT);
884     ERC32_Clear_interrupt(ERC32_INTERRUPT_EXTERNAL_4);
885    
886     /* Check if the store channel is enabled */
887     if(FT_RWChannel.StoreEnable != FT_STR_NONE)
888     {
889     /* Notify the SRAMPageManager that a SRAM page was saved and can be reused */
890     PM_piPageWasSaved(FT_RWChannel.FileId);
891     /* Tell the FileManager to finalize the new file info */
892     FS_piUpdateFile();
893     /* Free the store channel */
894     FT_RWChannel.SaveInProgress = FALSE;
895    
896     }
897     else
898     {
899     /* Unespected WPBUS Write EOT */
900     /*@LOG LOG_INFN HA_piLogHistoryEntry10(HA_E10_SW_SM,HA_E10_UNESPECTED_WPBEOT,HA_E10_REP2_NULL); */
901     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,HA_E10_REP2_NULL);
902     }
903     LU_UART_CR('F');
904     /* wake up the File Manager Task for an other store */
905     OS_piResourceRelease ( FT_RES );
906     }
907    
908     /*****************************************************************************/
909     /* @Function: FT_opReadEOT */
910     /* @Purpose : */
911     /* This function is called by the RPBUS EOT interrupt and signals the end */
912     /* of a single sector transfer to the TAM I/F. If the there are some more */
913     /* sector left than a new transfer is started. */
914     /* @@ */
915     /* @Parameter Name @Mode @Description */
916     /* @@ */
917     /*****************************************************************************/
918    
919     void FT_opReadEOT(void)
920     {
921     unsigned int intLevel,code;
922     FS_SECT_DESCR sectorInfo;
923     MsgTsk Msg;
924     //int led [4] = {0x4, 0xC, 0x4C, 0xCC}; // XXXDEBUG MASSIMO
925    
926     /* Clear the REOT interrupt */
927     SD_piClearInt(SD_RPB_EOT);
928     ERC32_Clear_interrupt(ERC32_INTERRUPT_EXTERNAL_3);
929    
930     /*
931     Start Download next sector.
932     */
933    
934     FT_RWChannel.ReadSectors++;
935     /* Retrive the info of the next sector to be downloaded */
936     FS_piGetNextSector(&sectorInfo);
937     /* Program the DRAMMA with the address of the next sector */
938     FD_piDrammaWrWPBUSReg(FT_RWChannel.ActiveModule, FD_RADDR1_WPBUS, sectorInfo.SectAddr);
939     FD_piSetBlockLength (FT_SECTSIZE / FT_SAMPLESIZE);
940     FD_piStartTransferFromMemory(FT_RWChannel.ActiveModule, TRUE);
941    
942     //---------
943    
944    
945     // /* Playback Automa states */
946     // switch(FT_RWChannel.PlayBackStatus) {
947     // /* The playback is running */
948     // case FT_RUN: {
949     // FT_RWChannel.ReadSectors++;
950    
951     // //TM_piSendTC (TM_DBL_CMD, led[FT_RWChannel.ReadSectors - 1]); // XXXDEBUG MASSIMO
952    
953     // /* Retrive the info of the next sector to be downloaded */
954     // FS_piGetNextSector(&sectorInfo);
955     // /* Program the DRAMMA with the address of the next sector */
956     // FD_piDrammaWrWPBUSReg(FT_RWChannel.ActiveModule, FD_RADDR1_WPBUS, sectorInfo.SectAddr);
957    
958     // if(!sectorInfo.LastSectFlag) {
959     // /* If no LSF reached then start a new transfer */
960    
961     // // XXXDEBUG MASSIMO BEGIN -------------------------------------------------------------------------------------------------------------------
962     // // per consentire il download di settori da 1024*1015 byte, abbiamo aggiunto la seguente istruzione e cambiato quella successiva
963    
964     // FD_piSetBlockLength (FT_SECTSIZE / FT_SAMPLESIZE);
965     // FD_piStartTransferFromMemory(FT_RWChannel.ActiveModule, TRUE); // FD_piStartTransferFromMemory(FT_RWChannel.ActiveModule, FALSE);
966     // // XXXDEBUG MASSIMO END ---------------------------------------------------------------------------------------------------------------------------------------------------------
967     // }
968     // else {
969     // /* If LSF was reached then set the last sector length */
970     // /* without starting a new transfer */
971    
972     // FD_piSetBlockLength (FT_SECTSIZE / FT_SAMPLESIZE); // XXXDEBUG MASSIMO FD_piSetBlockLength(sectorInfo.LastSectLength);
973    
974     // // XXXDEBUG MASSIMO BEGIN -------------------------------------------------------------------------------------------------------------------
975     // /*
976     // in order to fix the "End of 1-MB gap problem" we have commented next line and added the subsequent two lines.
977     // ( view in file FT_MMSUManager_in.c function FT_ifStartDownlink the change
978     // indroduced by zulianello@laben in his visit in Roma, 28.07.2003)
979     // */
980    
981     // // FT_RWChannel.PlayBackStatus = FT_LSF;
982     // FT_RWChannel.PlayBackStatus = FT_LST;
983     // FD_piStartTransferFromMemory(FT_RWChannel.ActiveModule, TRUE);
984     // // XXXDEBUG MASSIMO END ---------------------------------------------------------------------------------------------------------------------------------------------------------
985     // }
986     // } break;
987     // case FT_LSF: {
988     // /* A LSF was perviously reached so do nothing but start a new transfer */
989     // FT_RWChannel.PlayBackStatus = FT_LST;
990     // FD_piStartTransferFromMemory(FT_RWChannel.ActiveModule, TRUE);
991     // FT_RWChannel.ReadSectors++;
992     // } break;
993     // case FT_LST: {
994     // /* The last sector was transfered so disable playback related Interrupts */
995     // /* and close the read channel */
996     // OS_piInterDisable(&intLevel);
997     // SD_piMaskInt(SD_RPB_EOT);
998     // OS_piInterEnable(intLevel);
999     // FT_RWChannel.PlayBackStatus = FT_END;
1000     // FT_RWChannel.ReadSectors++;
1001     // FT_ifDownLinkClose(&FT_RWChannel);
1002    
1003     // // XXXDEBUG MASSIMO BEGIN -------------------------------------------------------------------------------------------------------------------
1004     // // invio dell'evento di fine DOWNLOAD
1005    
1006     // //TM_piSendTC (TM_DBL_CMD, led[FT_RWChannel.ReadSectors - 1]); // XXXDEBUG MASSIMO
1007    
1008     // TM_piSendTC (TM_HL_CMD_24, 0x1);
1009     // LU_INFN_LOG(LU_WARNING,0xffffffff,__FILEID__,__LINE__,FT_task2notify_EOD);
1010     // code=OS_piEventSend (FT_task2notify_EOD, OS_EVENT_END_OF_DOWNLINK);
1011     // LU_INFN_LOG(LU_WARNING,0xffffffff,__FILEID__,__LINE__,FT_task2notify_EOD);
1012     // LU_INFN_LOG(LU_WARNING,0xffffffff,__FILEID__,__LINE__,code);
1013     // // XXXDEBUG MASSIMO END -------------------------------------------------------------------------------------------------------------------
1014     // } break;
1015     // default:{
1016     // /* Unespected RPBUS Read EOT */
1017     // HA_piLogHistoryEntry10(HA_E10_SW_SM,HA_E10_UNESPECTED_RPBEOT,HA_E10_REP2_NULL);
1018     // }
1019     // }
1020     }
1021    
1022     /*****************************************************************************/
1023     /* @Function: FT_opMemModuleStat */
1024     /* @Purpose : */
1025     /* This function return a 16 bit word containing the status of the memory */
1026     /* modules as described in RTF Data Area Layout */
1027     /* @@ */
1028     /* @Parameter Name @Mode @Description */
1029     /* status_code OUT status of the operation */
1030     /* PtrModStat OUT modules status word */
1031     /* @@ */
1032     /*****************************************************************************/
1033    
1034     void FT_opMemModuleStat(UINT16* PtrModStat)
1035     {
1036     UINT16 ModStat = 0x0000;
1037    
1038     /* Retrive the mass memory modules status for the RTF telemetry */
1039     if(FT_MMSUStatus.Module[FT_MEM_MOD_1].Column[FT_SPARE_COL] != FT_COLUMN_OFF)
1040     ModStat |= FT_RTF_MOD1_NOSPARE;
1041     if(FT_MMSUStatus.Module[FT_MEM_MOD_1].Mode != FT_MODE_MEM_MOD_OFF)
1042     ModStat |= FT_RTF_MOD1_ON;
1043     if(FT_MMSUStatus.Module[FT_MEM_MOD_2].Column[FT_SPARE_COL] != FT_COLUMN_OFF)
1044     ModStat |= FT_RTF_MOD2_NOSPARE;
1045     if(FT_MMSUStatus.Module[FT_MEM_MOD_2].Mode != FT_MODE_MEM_MOD_OFF)
1046     ModStat |= FT_RTF_MOD2_ON;
1047     if(FT_MMSUStatus.Module[FT_MEM_MOD_1].State == FT_STATE_MOD_FAIL)
1048     ModStat |= FT_RTF_MOD1_NOTWORK;
1049     if(FT_MMSUStatus.Module[FT_MEM_MOD_2].State == FT_STATE_MOD_FAIL)
1050     ModStat |= FT_RTF_MOD2_NOTWORK;
1051     *PtrModStat = ModStat;
1052     }
1053    
1054     /*****************************************************************************/
1055     /* @Function: FT_opChangeAcqMode */
1056     /* @Purpose : */
1057     /* This function is used to switch between the three possible acquisition */
1058     /* type. */
1059     /* @@ */
1060     /* @Parameter Name @Mode @Description */
1061     /* FT_CHACQ_RESULT OUT Return code */
1062     /* mode IN Acquisition mode */
1063     /* @@ */
1064     /*****************************************************************************/
1065    
1066     FT_CHACQ_RESULT FT_opChangeAcqMode(SM_ACQMODE mode)
1067     {
1068     FT_CHACQ_RESULT status = FT_CHACQ_OK;
1069    
1070     if(mode < SM_MAXMODES)
1071     {
1072     /* Stop ongoing acquisition */
1073     PM_pi_SetAcqMode(SM_IDLE);
1074     /* Disable the store channel */
1075     FT_ifDisableStore(&FT_RWChannel, TRUE);
1076     /* Enable the Store channel */
1077     FT_ifEnableStore(&FT_RWChannel);
1078     /* Start the acquisition in the new mode */
1079     PM_pi_SetAcqMode(mode);
1080     }
1081     else
1082     {
1083     status = FT_CHACQ_WRONGMODE;
1084     }
1085     return (status);
1086     }
1087    
1088     /*****************************************************************************/
1089     /* @Function: FT_opChangeOpMode */
1090     /* @Purpose : */
1091     /* The function performs all the operations necessary to switch the system */
1092     /* operational status */
1093     /* */
1094     /* @@ */
1095     /* @Parameter Name @Mode @Description */
1096     /* FT_CHMODE_RESULT OUT Return code */
1097     /* @@ */
1098     /*****************************************************************************/
1099    
1100     FT_CHMODE_RESULT FT_opChangeOpMode(MC_STATE state)
1101     {
1102     FT_CHMODE_RESULT status = FT_CHMODE_OK;
1103     UINT32 ModeLog;
1104    
1105     /* Set the system state */
1106     switch(state) {
1107     /* Enter the Maintenance operative mode */
1108     case MC_MAINTENANCE_STATE: {
1109     #ifndef SIMULATOR
1110     /* Stop any ongoing downlink */
1111     FT_ifDownlinkAbort(&FT_RWChannel);
1112     #endif
1113     /* Stop any ongoing acquisition */
1114     PM_pi_SetAcqMode(SM_IDLE);
1115     #ifndef SIMULATOR
1116     /* Stop any ongoing store operation */
1117     FT_ifDisableStore(&FT_RWChannel,TRUE);
1118     #endif
1119     /* Reinit the SRAMPageManager and */
1120     /* The Read/Write channel */
1121     PM_piSRAMPageManagerInit(FALSE);
1122     #ifndef SIMULATOR
1123     FT_ifRWChannelInit(&FT_RWChannel,
1124     FT_RWChannel.ActiveModule,
1125     FT_RWChannel.PtrModuleStatus);
1126     #endif
1127     ModeLog = HA_E0_MAINTENANCE;
1128     } break;
1129     case MC_ACTIVE_STATE: {
1130     /* Reset the Filesystem */
1131     // FS_piInitFileSystem();
1132     /* Reinit the SRAMPageManager and */
1133     /* The Read/Write channel */
1134     PM_piSRAMPageManagerInit(FALSE);
1135     FT_ifRWChannelInit(&FT_RWChannel,
1136     FT_RWChannel.ActiveModule,
1137     FT_RWChannel.PtrModuleStatus);
1138     FT_ifEnableStore(&FT_RWChannel);
1139     // PM_pi_SetAcqMode(SM_IDLE);
1140     ModeLog = HA_E0_ACTIVE;
1141     } break;
1142     }
1143     /*========= Entry 0 Log in History Area ==========*/
1144     /*@LOG LOG_INFN HA_piLogHistoryEntry0(HA_E0_STARTING,ModeLog,0); */
1145     LU_INFN_LOG(LU_CRITICAL,LU_MASK(__FILEID__),__FILEID__,__LINE__,0xbabe);
1146     return (status);
1147     }
1148    
1149     /*****************************************************************************/
1150     /* @Function: FT_opModuleTest */
1151     /* @Purpose : */
1152     /* The function sends a message to the MMSUManager task in order to start */
1153     /* the memory module test */
1154     /* */
1155     /* @@ */
1156     /* @Parameter Name @Mode @Description */
1157     /* @@ */
1158     /*****************************************************************************/
1159    
1160     void FT_opModuleTest(void)
1161     {
1162     MsgTsk sndMsgMCMD;
1163    
1164     sndMsgMCMD.Code = FT_MEM_MODULE_TEST;
1165     FT_piSndMsgMMSUManager(&sndMsgMCMD);
1166     }
1167    
1168     /*****************************************************************************/
1169     /* @Function: FT_opPacket2MMSU */
1170     /* @Purpose : */
1171     /* This function is used to store a packet in Memory Module or for send a */
1172     /* packet on CMD I/F */
1173     /* */
1174     /* @@ */
1175     /* @Parameter Name @Mode @Description */
1176     /* PtrRWChannel IN Pointer to the RWchannel manage structure */
1177     /* @@ */
1178     /*****************************************************************************/
1179    
1180     void FT_opPacket2MMSU (FT_SAVEREQUEST saveReq)
1181     {
1182     UINT32 writeSize;
1183     UINT32 writeAddr;
1184     UINT32 pktSize;
1185     BYTE* target;
1186     UINT32 intLevel;
1187    
1188     OS_piResourceObtain ( FT_RES, WAIT, NO_TIMEOUT);
1189    
1190     /* Disable ISR that access the store queue data structures */
1191     OS_piInterDisable(&intLevel);
1192     SD_piMaskInt(SD_WPB_EOT);
1193     OS_piInterEnable(intLevel);
1194    
1195     /* Start a new data transfer as in the SavePage function */
1196     FT_RWChannel.SaveInProgress = TRUE;
1197     FT_RWChannel.CurrentPageId = saveReq.PageId;
1198     writeSize = (saveReq.PageInfo+1) - ((UINT32)saveReq.PageId * SM_SRAMPAGESIZE);
1199    
1200     if(FS_piWriteFile(saveReq.FileId, writeSize, &writeAddr) != FS_SUCCESS)
1201     {
1202     PM_piPageWasSaved(saveReq.FileId);
1203     FT_RWChannel.SaveInProgress = FALSE;
1204     OS_piResourceRelease ( FT_RES );
1205    
1206     // LU_UART_CR('r');
1207     }
1208     else /* SUCCESS */
1209     {
1210     if(saveReq.FileId < FS_REGFILES)
1211     {
1212     LU_UART_CR('S');
1213    
1214     FT_RWChannel.FileId = saveReq.FileId;
1215     SD_piSetWPBUSReadPage(FT_RWChannel.CurrentPageId);
1216     SD_piSetWPBUSReadParams(saveReq.PageInfo);
1217     FD_piDrammaWrWPBUSReg(FT_RWChannel.ActiveModule, FD_WADDR_WPBUS, writeAddr);
1218     FD_piStartTransferToMemory(FT_RWChannel.ActiveModule);
1219     }
1220    
1221     if(saveReq.FileId == FS_CMD)
1222     {
1223     LU_UART_CR('C');
1224     SD_piSetCMDBUSReadPage(FT_RWChannel.CurrentPageId);
1225     SD_piSetCMDBUSReadParams(saveReq.PageInfo);
1226     SD_piStartTransferToCMD();
1227     /* Free the store channel */
1228     FT_RWChannel.SaveInProgress = FALSE;
1229     /* wake up the File Manager Task for an other store */
1230     OS_piResourceRelease ( FT_RES );
1231     }
1232    
1233     if(saveReq.FileId == FS_ERC32)
1234     {
1235     /* Evaluate the packet size in bytes */
1236     pktSize = (saveReq.PageInfo+1) - (UINT32)(saveReq.PageId * SM_SRAMPAGESIZE);
1237     /* Init the source hbus I/O SRAM address */
1238     SD_piSetSRAMRWAddress(saveReq.PageId * SM_SRAMPAGESIZE);
1239     /* Init the destination RAM address*/
1240     target = (BYTE *)writeAddr;
1241     /* Copy the packet */
1242     while(pktSize--)
1243     {
1244     *target = (BYTE)SD_piReadSRAM();
1245     target++;
1246     }
1247     PM_piPageWasSaved(FS_ERC32);
1248     /* Free the store channel */
1249     FT_RWChannel.SaveInProgress = FALSE;
1250     /* wake up the File Manager Task for an other store */
1251     LU_UART_CR('M');
1252     OS_piResourceRelease ( FT_RES );
1253     }
1254     }
1255     /* Re-enable ISR that access the store queue data structures */
1256     OS_piInterDisable(&intLevel);
1257     SD_piUnMaskInt(SD_WPB_EOT);
1258     OS_piInterEnable(intLevel);
1259     }
1260    
1261    
1262     // XXXDEBUG MASSIMO BEGIN -------------------------------------------------------------------------------------------------------------------------------------------------------
1263    
1264     BOOL FT_opSaveInProgress (void)
1265     {
1266     return FT_RWChannel.SaveInProgress;
1267     }
1268    
1269     BOOL FT_opDownloadInProgress (void)
1270     {
1271     return (FT_RWChannel.PlayBackStatus != FT_END);
1272     }
1273    
1274     // per definire il task a cui mandare la notifica di fine DOWNLOAD
1275    
1276     void FT_opSetTask2Notify_EOD (UINT32 task)
1277     {
1278     FT_task2notify_EOD = task;
1279     }
1280    
1281    
1282    

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