| 1 |
kusanagi |
1.1 |
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| 2 |
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<arr> |
| 3 |
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<name>LOG_MASK</name> |
| 4 |
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<n>113</n> |
| 5 |
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<idx>0</idx> |
| 6 |
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<location>3</location> |
| 7 |
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<default>{LU_DEFAULT_MASK}</default> |
| 8 |
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<comment><![CDATA[log level mask for each module /RO]]></comment> |
| 9 |
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</arr> |
| 10 |
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| 11 |
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<var> |
| 12 |
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<name>LU_WRITE_ON_UART</name> |
| 13 |
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<idx>0</idx> |
| 14 |
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<location>3</location> |
| 15 |
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<default>1</default> |
| 16 |
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<comment><![CDATA[enable[1]/disable[0] the UART writing /RO]]></comment> |
| 17 |
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</var> |
| 18 |
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| 19 |
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<var> |
| 20 |
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<name>VERBOSE_DEBUG</name> |
| 21 |
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<idx>1</idx> |
| 22 |
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<location>3</location> |
| 23 |
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<default>0</default> |
| 24 |
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<comment><![CDATA[Verbose Debug mode]]></comment> |
| 25 |
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</var> |
| 26 |
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| 27 |
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<var> |
| 28 |
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<name>DOWNLOAD_HEADER</name> |
| 29 |
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<idx>2</idx> |
| 30 |
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<location>3</location> |
| 31 |
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<default>0</default> |
| 32 |
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<comment><![CDATA[download counter, to be written in Download header info /RW-E2P]]></comment> |
| 33 |
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</var> |
| 34 |
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| 35 |
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<var> |
| 36 |
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<name>KHB_ALARM_REG_LOW_LEVEL_MASK</name> |
| 37 |
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<idx>3</idx> |
| 38 |
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<location>3</location> |
| 39 |
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<default>0</default> |
| 40 |
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<comment><![CDATA[mask of KHB Alarm register to be low-level masked /RO]]></comment> |
| 41 |
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</var> |
| 42 |
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| 43 |
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<var> |
| 44 |
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<name>KHB_STATUS_REG_LOW_LEVEL_MASK</name> |
| 45 |
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<idx>4</idx> |
| 46 |
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<location>3</location> |
| 47 |
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<default>0</default> |
| 48 |
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<comment><![CDATA[mask of KHB status register to be low-level masked /RO]]></comment> |
| 49 |
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</var> |
| 50 |
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| 51 |
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<var> |
| 52 |
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<name>PULSER_ACTION</name> |
| 53 |
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<idx>5</idx> |
| 54 |
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<location>3</location> |
| 55 |
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<default>0</default> |
| 56 |
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<comment><![CDATA[pulser action at startup; [0=none,1=Reset,2:0.25Hz,3:100Hz] /RO]]></comment> |
| 57 |
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</var> |
| 58 |
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| 59 |
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<var> |
| 60 |
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<name>N_BOOT</name> |
| 61 |
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<idx>6</idx> |
| 62 |
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<location>3</location> |
| 63 |
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<default>0</default> |
| 64 |
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<comment><![CDATA[Boot Counter /RW-E2P]]></comment> |
| 65 |
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</var> |
| 66 |
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| 67 |
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<var> |
| 68 |
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<name>THERMISTORS_CHECK</name> |
| 69 |
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<idx>7</idx> |
| 70 |
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<location>3</location> |
| 71 |
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<default>1</default> |
| 72 |
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<comment><![CDATA[Check if thermistor are going to be checked /RO]]></comment> |
| 73 |
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</var> |
| 74 |
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| 75 |
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<var> |
| 76 |
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<name>THERM_MASK</name> |
| 77 |
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<idx>8</idx> |
| 78 |
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<location>3</location> |
| 79 |
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<default>65535</default> |
| 80 |
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<comment><![CDATA[Thermistors mask /RO]]></comment> |
| 81 |
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</var> |
| 82 |
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| 83 |
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<arr> |
| 84 |
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<name>THERM_LOW</name> |
| 85 |
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<n>16</n> |
| 86 |
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<idx>1</idx> |
| 87 |
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<location>3</location> |
| 88 |
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<default>{93,93,93,93,93,93,93,93,93,93,93,93,84,84,93,93}</default> |
| 89 |
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<comment><![CDATA[Thermistor low limit /RO]]></comment> |
| 90 |
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</arr> |
| 91 |
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| 92 |
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<arr> |
| 93 |
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<name>THERM_HIGH</name> |
| 94 |
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<n>16</n> |
| 95 |
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<idx>2</idx> |
| 96 |
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<location>3</location> |
| 97 |
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<default>{123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123}</default> |
| 98 |
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<comment><![CDATA[Thermistor high limit /RO]]></comment> |
| 99 |
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</arr> |
| 100 |
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| 101 |
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<var> |
| 102 |
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<name>IPM_VOLTAGES_CHECK</name> |
| 103 |
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<idx>9</idx> |
| 104 |
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<location>3</location> |
| 105 |
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<default>1</default> |
| 106 |
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<comment><![CDATA[Check if ipm are going to be checked /RO]]></comment> |
| 107 |
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</var> |
| 108 |
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| 109 |
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<var> |
| 110 |
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<name>KHB_IDAQ_CHECK</name> |
| 111 |
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<idx>10</idx> |
| 112 |
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<location>3</location> |
| 113 |
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<default>1</default> |
| 114 |
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<comment><![CDATA[Check if khb&idaq are going to be checked /RO]]></comment> |
| 115 |
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</var> |
| 116 |
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| 117 |
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<var> |
| 118 |
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<name>NTRIG</name> |
| 119 |
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<idx>11</idx> |
| 120 |
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<location>3</location> |
| 121 |
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<default>3</default> |
| 122 |
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<comment><![CDATA[Max Number of Lacks of Triggers /RO]]></comment> |
| 123 |
|
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</var> |
| 124 |
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| 125 |
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<var> |
| 126 |
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<name>TRIG</name> |
| 127 |
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<idx>12</idx> |
| 128 |
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<location>2</location> |
| 129 |
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<default>0</default> |
| 130 |
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<comment><![CDATA[Counter of lacks of triggers /RW]]></comment> |
| 131 |
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</var> |
| 132 |
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| 133 |
|
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<tab> |
| 134 |
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<name>CONF</name> |
| 135 |
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<rows>5</rows> |
| 136 |
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<cols>6</cols> |
| 137 |
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<idx>0</idx> |
| 138 |
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<location>3</location> |
| 139 |
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<default>{{1,1,1,1,1,1},{1,1,1,1,1,0},{1,1,1,0,0,0},{1,0,1,0,0,0},{0,1,1,0,0,0}}</default> |
| 140 |
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<comment><![CDATA[active sensors - first dimention is the number of the incrementing configuration. second dimention is the number of FE /RO]]></comment> |
| 141 |
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</tab> |
| 142 |
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|
| 143 |
|
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<var> |
| 144 |
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<name>CONF_SEL</name> |
| 145 |
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<idx>13</idx> |
| 146 |
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<location>3</location> |
| 147 |
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<default>0</default> |
| 148 |
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<comment><![CDATA[active sensor selector /RW]]></comment> |
| 149 |
|
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</var> |
| 150 |
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| 151 |
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<var> |
| 152 |
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<name>CONFOK</name> |
| 153 |
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<idx>14</idx> |
| 154 |
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<location>3</location> |
| 155 |
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<default>1</default> |
| 156 |
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<comment><![CDATA[whether to hange configuration from ground or onboard too: 0:dont increment CONF_SEL 1:increment CONF_SEL 2:do POWER_OFF_ON /RO]]></comment> |
| 157 |
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</var> |
| 158 |
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| 159 |
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<var> |
| 160 |
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<name>OFF</name> |
| 161 |
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<idx>15</idx> |
| 162 |
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<location>2</location> |
| 163 |
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<default>0</default> |
| 164 |
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<comment><![CDATA[Counter of ON/OFF /RW]]></comment> |
| 165 |
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</var> |
| 166 |
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| 167 |
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<var> |
| 168 |
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<name>NOFF</name> |
| 169 |
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<idx>16</idx> |
| 170 |
|
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<location>3</location> |
| 171 |
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<default>2</default> |
| 172 |
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<comment><![CDATA[Max Number of ON/OFF /RO]]></comment> |
| 173 |
|
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</var> |
| 174 |
|
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| 175 |
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<var> |
| 176 |
|
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<name>NRES</name> |
| 177 |
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<idx>17</idx> |
| 178 |
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<location>3</location> |
| 179 |
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<default>6</default> |
| 180 |
|
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<comment><![CDATA[Max number of reset /RO]]></comment> |
| 181 |
|
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</var> |
| 182 |
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| 183 |
|
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<var> |
| 184 |
|
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<name>RES</name> |
| 185 |
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<idx>18</idx> |
| 186 |
|
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<location>2</location> |
| 187 |
|
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<default>0</default> |
| 188 |
|
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<comment><![CDATA[Counter of reset /RW]]></comment> |
| 189 |
|
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</var> |
| 190 |
|
|
|
| 191 |
|
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<var> |
| 192 |
|
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<name>WATCHDOG_RESET_DISABLE</name> |
| 193 |
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<idx>19</idx> |
| 194 |
|
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<location>2</location> |
| 195 |
|
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<default>0</default> |
| 196 |
|
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<comment><![CDATA[disable watchdog reset: only for debugging!]]></comment> |
| 197 |
|
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</var> |
| 198 |
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|
| 199 |
|
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<var> |
| 200 |
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<name>NFAILED_POWER_ON</name> |
| 201 |
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<idx>20</idx> |
| 202 |
|
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<location>3</location> |
| 203 |
|
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<default>3</default> |
| 204 |
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<comment><![CDATA[max number of failed power_on, before STOP&WAIT /RO]]></comment> |
| 205 |
|
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</var> |
| 206 |
|
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| 207 |
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<var> |
| 208 |
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<name>AUTO_RM_MODE</name> |
| 209 |
|
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<idx>21</idx> |
| 210 |
|
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<location>2</location> |
| 211 |
|
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<default>0</default> |
| 212 |
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<comment><![CDATA[define the Automatic Mode for RM /RO]]></comment> |
| 213 |
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</var> |
| 214 |
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| 215 |
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<var> |
| 216 |
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<name>AUTO_SCM_MODE</name> |
| 217 |
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<idx>22</idx> |
| 218 |
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<location>2</location> |
| 219 |
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<default>1</default> |
| 220 |
|
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<comment><![CDATA[define the Automatic Mode for scm /RO]]></comment> |
| 221 |
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</var> |
| 222 |
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|
| 223 |
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<var> |
| 224 |
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<name>MASK_ACQ_ALARM</name> |
| 225 |
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<idx>23</idx> |
| 226 |
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<location>3</location> |
| 227 |
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<default>65535</default> |
| 228 |
|
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<comment><![CDATA[Alarm mask /RO]]></comment> |
| 229 |
|
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</var> |
| 230 |
|
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| 231 |
|
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<var> |
| 232 |
|
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<name>GOM_DURING_ALARM</name> |
| 233 |
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<idx>24</idx> |
| 234 |
|
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<location>2</location> |
| 235 |
|
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<default>0</default> |
| 236 |
|
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<comment><![CDATA[General operation mode during alarm revelation /RW]]></comment> |
| 237 |
|
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</var> |
| 238 |
|
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|
| 239 |
|
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<var> |
| 240 |
|
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<name>PM_FORCE_RUNNING_TIMEOUT</name> |
| 241 |
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<idx>25</idx> |
| 242 |
|
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<location>3</location> |
| 243 |
|
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<default>3600000</default> |
| 244 |
|
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<comment><![CDATA[waiting for start select mode before force go to running]]></comment> |
| 245 |
|
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</var> |
| 246 |
|
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|
| 247 |
|
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<var> |
| 248 |
|
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<name>PAMELA_ON</name> |
| 249 |
|
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<idx>26</idx> |
| 250 |
|
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<location>2</location> |
| 251 |
|
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<default>0</default> |
| 252 |
|
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<comment><![CDATA[Pamela status [0=OFF-1:OFF] /RW]]></comment> |
| 253 |
|
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</var> |
| 254 |
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|
| 255 |
|
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<var> |
| 256 |
|
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<name>N_CALIB</name> |
| 257 |
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<idx>27</idx> |
| 258 |
|
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<location>2</location> |
| 259 |
|
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<default>0</default> |
| 260 |
|
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<comment><![CDATA[Counter of calibratrion since start up /RW]]></comment> |
| 261 |
|
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</var> |
| 262 |
|
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|
| 263 |
|
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<var> |
| 264 |
|
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<name>AC_1_ON</name> |
| 265 |
|
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<idx>28</idx> |
| 266 |
|
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<location>2</location> |
| 267 |
|
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<default>0</default> |
| 268 |
|
|
<comment><![CDATA[AC 1 on from initialization /RW]]></comment> |
| 269 |
|
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</var> |
| 270 |
|
|
|
| 271 |
|
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<var> |
| 272 |
|
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<name>AC_2_ON</name> |
| 273 |
|
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<idx>29</idx> |
| 274 |
|
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<location>2</location> |
| 275 |
|
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<default>0</default> |
| 276 |
|
|
<comment><![CDATA[AC 2 on from initialization /RW]]></comment> |
| 277 |
|
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</var> |
| 278 |
|
|
|
| 279 |
|
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<var> |
| 280 |
|
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<name>POWER_MODE</name> |
| 281 |
|
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<idx>30</idx> |
| 282 |
|
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<location>3</location> |
| 283 |
|
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<default>1</default> |
| 284 |
|
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<comment><![CDATA[Power mode of PAMELA /RW]]></comment> |
| 285 |
|
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</var> |
| 286 |
|
|
|
| 287 |
|
|
<var> |
| 288 |
|
|
<name>TRIG_II</name> |
| 289 |
|
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<idx>31</idx> |
| 290 |
|
|
<location>3</location> |
| 291 |
|
|
<default>0</default> |
| 292 |
|
|
<comment><![CDATA[TRIGGER II level mode on/off /RO]]></comment> |
| 293 |
|
|
</var> |
| 294 |
|
|
|
| 295 |
|
|
<var> |
| 296 |
|
|
<name>BUF_LEN_TRIG_II_INIT</name> |
| 297 |
|
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<idx>32</idx> |
| 298 |
|
|
<location>1</location> |
| 299 |
|
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<default>199</default> |
| 300 |
|
|
<comment><![CDATA[TRIG_II init command queue]]></comment> |
| 301 |
|
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</var> |
| 302 |
|
|
|
| 303 |
|
|
<arr> |
| 304 |
|
|
<name>BUF_TRIG_II_INIT</name> |
| 305 |
|
|
<n>3750</n> |
| 306 |
|
|
<idx>3</idx> |
| 307 |
|
|
<location>1</location> |
| 308 |
|
|
<default>{0x06D0212D,0x0001AA7F,0xD043330A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F310A,0x001F0A00,0x1F0A001F,0x0A001F0A,0x001F0A00,0x1F000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00001803,0x3F000000,0x0A000FAA,0x06D0212D,0x0000AA07,0xD043331C,0x030FAA00}</default> |
| 309 |
|
|
<comment><![CDATA[TRIG_II init command queue]]></comment> |
| 310 |
|
|
</arr> |
| 311 |
|
|
|
| 312 |
|
|
<var> |
| 313 |
|
|
<name>BUF_LEN_TRIG_II_ACQ</name> |
| 314 |
|
|
<idx>33</idx> |
| 315 |
|
|
<location>1</location> |
| 316 |
|
|
<default>561</default> |
| 317 |
|
|
<comment><![CDATA[TRIG_II acq command queue]]></comment> |
| 318 |
|
|
</var> |
| 319 |
|
|
|
| 320 |
|
|
<arr> |
| 321 |
|
|
<name>BUF_TRIG_II_ACQ</name> |
| 322 |
|
|
<n>375</n> |
| 323 |
|
|
<idx>4</idx> |
| 324 |
|
|
<location>1</location> |
| 325 |
|
|
<default>{0x039DF6AA,0x080A2171,0x0006015D,0xAA080A21,0x61000355,0xD0AA080A,0x2171000C,0x11AFAA08,0x0A216100,0x040110AA,0x080A2161,0x00041160,0xAA080A31,0x41003001,0x73AA080A,0x31510030,0x0114AA08,0x0A212100,0x08056BAA,0x080A2111,0x00070214,0xAA080A21,0x11000201,0x5CAA0608,0x21D0C1F3,0xAA060821,0xD0C2FAAA,0x06A810E0,0xC00DAA0D,0xAD100000,0x00000000,0x00000000,0xAA060821,0xD1C1E6AA,0x060821D1,0xC2EFAA06,0xA810E1C0,0x18AA0DAD,0x10000000,0x00000000,0x000000AA,0x060821D2,0xC1D9AA06,0x0821D2C2,0xD0AA06A8,0x10E2C027,0xAA0DAD10,0x00000000,0x00000000,0x0000AA06,0x0821D3C1,0xCCAA0608,0x21D3C2C5,0xAA06A810,0xE3C032AA,0x0DAD1000,0x00000000,0x00000000,0x00AA0608,0x21D4C1A7,0xAA060821,0xD4C2AEAA,0x06A810E4,0xC059AA0D,0xAD100000,0x00000000,0x00000000,0xAA060821,0xD5C1B2AA,0x060821D5,0xC2BBAA06,0xA810E5C0,0x4CAA0DAD,0x10000000,0x00000000,0x000000AA,0x05A8100F,0x2DAA0B09,0x31008100,0x40003F52,0x90AA0B07,0x31008100,0x40003F52,0x90AA0702,0x71E874A7,0x08AA0703,0x71E874A7,0x08AA0704,0x71E874A7,0x08AA0705,0x71E874A7,0x08AA0D00,0x92000708,0x53006000,0x0F709DAA,0x0D009200,0x07182300,0x60000F70,0x03AA0D00,0x92000728,0xB3006000,0x0F70A6AA,0x0D009200,0x0738C300,0x60000F70,0x38AA0D00,0x92000748,0x94006000,0x0F70EBAA,0x0D009200,0x0758E400,0x60000F70,0x75AA0D01,0x92000708,0x53006000,0x0F709DAA,0x0D019200,0x07182300,0x60000F70,0x03AA0D01,0x92000728,0xB3006000,0x0F70A6AA,0x0D019200,0x0738C300,0x60000F70,0x38AA0D01,0x92000748,0x94006000,0x0F70EBAA,0x0D019200,0x0758E400,0x60000F70,0x75AA0806,0x320002D8,0x2C2CAA05,0x0C210000,0xAA050C21,0x0000AA05,0x0C210000,0xAA000000}</default> |
| 326 |
|
|
<comment><![CDATA[TRIG_II acq command queue]]></comment> |
| 327 |
|
|
</arr> |
| 328 |
|
|
|
| 329 |
|
|
<var> |
| 330 |
|
|
<name>EXP64_MODE</name> |
| 331 |
|
|
<idx>34</idx> |
| 332 |
|
|
<location>3</location> |
| 333 |
|
|
<default>1</default> |
| 334 |
|
|
<comment><![CDATA[if TRUE, working in exp 64 mode /RO]]></comment> |
| 335 |
|
|
</var> |
| 336 |
|
|
|
| 337 |
|
|
<var> |
| 338 |
|
|
<name>EXP64_MODE_DELAY</name> |
| 339 |
|
|
<idx>35</idx> |
| 340 |
|
|
<location>3</location> |
| 341 |
|
|
<default>0</default> |
| 342 |
|
|
<comment><![CDATA[delay for exp 64 mode acquiring /RO]]></comment> |
| 343 |
|
|
</var> |
| 344 |
|
|
|
| 345 |
|
|
<var> |
| 346 |
|
|
<name>MH_END_OF_DOWNLOAD_TIMEOUT</name> |
| 347 |
|
|
<idx>36</idx> |
| 348 |
|
|
<location>3</location> |
| 349 |
|
|
<default>60000</default> |
| 350 |
|
|
<comment><![CDATA[time out of the end of download /RO]]></comment> |
| 351 |
|
|
</var> |
| 352 |
|
|
|
| 353 |
|
|
<var> |
| 354 |
|
|
<name>PM_STOP_RUNMANAGER_TIMEOUT</name> |
| 355 |
|
|
<idx>37</idx> |
| 356 |
|
|
<location>3</location> |
| 357 |
|
|
<default>1000</default> |
| 358 |
|
|
<comment><![CDATA[the maximu time to wait for the pam manager the notification of SINT_OK from the run manager, when a SINT is sent. This avoids the pam manager waits forever when it wants to stop the run manager /RO]]></comment> |
| 359 |
|
|
</var> |
| 360 |
|
|
|
| 361 |
|
|
<var> |
| 362 |
|
|
<name>PM_STOP_RUNMANAGER_TIMES_RETRY</name> |
| 363 |
|
|
<idx>38</idx> |
| 364 |
|
|
<location>3</location> |
| 365 |
|
|
<default>5</default> |
| 366 |
|
|
<comment><![CDATA[The Number of times the PamManager tries to repeat the stop request to the RunManager, before exit of the cycle. /RO]]></comment> |
| 367 |
|
|
</var> |
| 368 |
|
|
|
| 369 |
|
|
<var> |
| 370 |
|
|
<name>PM_N_ORBIT_CALIB</name> |
| 371 |
|
|
<idx>39</idx> |
| 372 |
|
|
<location>3</location> |
| 373 |
|
|
<default>1</default> |
| 374 |
|
|
<comment><![CDATA[Number of orbits per calibration /RO]]></comment> |
| 375 |
|
|
</var> |
| 376 |
|
|
|
| 377 |
|
|
<arr> |
| 378 |
|
|
<name>WS_1_SETTING</name> |
| 379 |
|
|
<n>5</n> |
| 380 |
|
|
<idx>5</idx> |
| 381 |
|
|
<location>3</location> |
| 382 |
|
|
<default>{720000,2160000,2700000,5490000,6390000}</default> |
| 383 |
|
|
<comment><![CDATA[Define the Working Schedule #1 values in ms /RO]]></comment> |
| 384 |
|
|
</arr> |
| 385 |
|
|
|
| 386 |
|
|
<var> |
| 387 |
|
|
<name>WS_TIME_ORBIT</name> |
| 388 |
|
|
<idx>40</idx> |
| 389 |
|
|
<location>3</location> |
| 390 |
|
|
<default>5670000</default> |
| 391 |
|
|
<comment><![CDATA[The duration in millisencond of the full orbit in ms /RO]]></comment> |
| 392 |
|
|
</var> |
| 393 |
|
|
|
| 394 |
|
|
<var> |
| 395 |
|
|
<name>WS_FAVOURITE_WS</name> |
| 396 |
|
|
<idx>41</idx> |
| 397 |
|
|
<location>3</location> |
| 398 |
|
|
<default>0</default> |
| 399 |
|
|
<comment><![CDATA[The Favourite Pamela Working Schedule /RO]]></comment> |
| 400 |
|
|
</var> |
| 401 |
|
|
|
| 402 |
|
|
<var> |
| 403 |
|
|
<name>RM_N_TRIES_PREPARE_PAGE</name> |
| 404 |
|
|
<idx>42</idx> |
| 405 |
|
|
<location>3</location> |
| 406 |
|
|
<default>100</default> |
| 407 |
|
|
<comment><![CDATA[Number of attempts to try to exec the prepar page before exit from the run procedure with an error /RO]]></comment> |
| 408 |
|
|
</var> |
| 409 |
|
|
|
| 410 |
|
|
<var> |
| 411 |
|
|
<name>RM_TRIES_PREPARE_PAGE_SLEEP</name> |
| 412 |
|
|
<idx>43</idx> |
| 413 |
|
|
<location>3</location> |
| 414 |
|
|
<default>2</default> |
| 415 |
|
|
<comment><![CDATA[Number of ticks to suspend the RM task if the PIF is full before another attempt to execute the PreparePage procedure /RO]]></comment> |
| 416 |
|
|
</var> |
| 417 |
|
|
|
| 418 |
|
|
<var> |
| 419 |
|
|
<name>RM_WS3_TIMER_FIRE_AFTER</name> |
| 420 |
|
|
<idx>44</idx> |
| 421 |
|
|
<location>3</location> |
| 422 |
|
|
<default>8000</default> |
| 423 |
|
|
<comment><![CDATA[Time to wait for the WS3 timer to fire /RO]]></comment> |
| 424 |
|
|
</var> |
| 425 |
|
|
|
| 426 |
|
|
<arr> |
| 427 |
|
|
<name>RM_RATE_METER_S1_TRH</name> |
| 428 |
|
|
<n>2</n> |
| 429 |
|
|
<idx>6</idx> |
| 430 |
|
|
<location>3</location> |
| 431 |
|
|
<default>{2000,1600}</default> |
| 432 |
|
|
<comment><![CDATA[Rate meter s1 register TRH.used to toggle A/B mode in WS3 mode. the index of the array is related to the current ACQ mode (0=A to B,1=B to A) /RO]]></comment> |
| 433 |
|
|
</arr> |
| 434 |
|
|
|
| 435 |
|
|
<var> |
| 436 |
|
|
<name>RM_TIME_MAX_RUN</name> |
| 437 |
|
|
<idx>45</idx> |
| 438 |
|
|
<location>3</location> |
| 439 |
|
|
<default>1800000</default> |
| 440 |
|
|
<comment><![CDATA[Max duration for an ordinary Run in milliseconds /RO]]></comment> |
| 441 |
|
|
</var> |
| 442 |
|
|
|
| 443 |
|
|
<var> |
| 444 |
|
|
<name>RM_TIME_SPECIAL_RUN</name> |
| 445 |
|
|
<idx>46</idx> |
| 446 |
|
|
<location>3</location> |
| 447 |
|
|
<default>100000</default> |
| 448 |
|
|
<comment><![CDATA[duration for the special run in milliseconds /RO]]></comment> |
| 449 |
|
|
</var> |
| 450 |
|
|
|
| 451 |
|
|
<var> |
| 452 |
|
|
<name>RM_ACQCHECK_PERIOD</name> |
| 453 |
|
|
<idx>47</idx> |
| 454 |
|
|
<location>3</location> |
| 455 |
|
|
<default>1000</default> |
| 456 |
|
|
<comment><![CDATA[period of acquisition check in milliseconds /RO]]></comment> |
| 457 |
|
|
</var> |
| 458 |
|
|
|
| 459 |
|
|
<var> |
| 460 |
|
|
<name>RM_FLUSH_TIMEOUT</name> |
| 461 |
|
|
<idx>48</idx> |
| 462 |
|
|
<location>3</location> |
| 463 |
|
|
<default>20000</default> |
| 464 |
|
|
<comment><![CDATA[timeout for the flush operation check after a certain inactivity of the rum nanager. if zero means RTEMS_NO_TIMEOUT /RO]]></comment> |
| 465 |
|
|
</var> |
| 466 |
|
|
|
| 467 |
|
|
<var> |
| 468 |
|
|
<name>RM_NO_FLUSH_PARAM_DUMP</name> |
| 469 |
|
|
<idx>49</idx> |
| 470 |
|
|
<location>3</location> |
| 471 |
|
|
<default>200</default> |
| 472 |
|
|
<comment><![CDATA[Number of automatic flusches after wich also VAR/ARR/TAB dump is done. If zero means never. /RO]]></comment> |
| 473 |
|
|
</var> |
| 474 |
|
|
|
| 475 |
|
|
<var> |
| 476 |
|
|
<name>RM_DUMP_ALL_PARAMS</name> |
| 477 |
|
|
<idx>50</idx> |
| 478 |
|
|
<location>3</location> |
| 479 |
|
|
<default>0</default> |
| 480 |
|
|
<comment><![CDATA[dump also parameters tagget as not storend in MM stored. BITMASK : bit 0 -> store variables , bit 1 -> store arrays , bit 3 -> store tabs /RO]]></comment> |
| 481 |
|
|
</var> |
| 482 |
|
|
|
| 483 |
|
|
<var> |
| 484 |
|
|
<name>RM_NO_DUMMY_CMD_BEFORE_SPECIAL_TRK_ACQ</name> |
| 485 |
|
|
<idx>51</idx> |
| 486 |
|
|
<location>3</location> |
| 487 |
|
|
<default>70</default> |
| 488 |
|
|
<comment><![CDATA[number of release busy inserted in the ACQ command queue in After_Calib mode /RO]]></comment> |
| 489 |
|
|
</var> |
| 490 |
|
|
|
| 491 |
|
|
<arr> |
| 492 |
|
|
<name>PWR_IPM_CONF</name> |
| 493 |
|
|
<n>6</n> |
| 494 |
|
|
<idx>7</idx> |
| 495 |
|
|
<location>3</location> |
| 496 |
|
|
<default>{1,1,1,1,1,1}</default> |
| 497 |
|
|
<comment><![CDATA[IMP desired configuration for initial poweron 6 bitmask /RO]]></comment> |
| 498 |
|
|
</arr> |
| 499 |
|
|
|
| 500 |
|
|
<var> |
| 501 |
|
|
<name>PWR_WAIT_BEFORE_SENDTC</name> |
| 502 |
|
|
<idx>52</idx> |
| 503 |
|
|
<location>3</location> |
| 504 |
|
|
<default>110</default> |
| 505 |
|
|
<comment><![CDATA[time to wait before send 2 successive HL /RO]]></comment> |
| 506 |
|
|
</var> |
| 507 |
|
|
|
| 508 |
|
|
<var> |
| 509 |
|
|
<name>PWR_CMD2PSB_DELAY</name> |
| 510 |
|
|
<idx>53</idx> |
| 511 |
|
|
<location>3</location> |
| 512 |
|
|
<default>100</default> |
| 513 |
|
|
<comment><![CDATA[time to wait before every CMD2PSB]]></comment> |
| 514 |
|
|
</var> |
| 515 |
|
|
|
| 516 |
|
|
<var> |
| 517 |
|
|
<name>PWR_TRB_READ_ATTEMPTS</name> |
| 518 |
|
|
<idx>54</idx> |
| 519 |
|
|
<location>3</location> |
| 520 |
|
|
<default>10</default> |
| 521 |
|
|
<comment><![CDATA[number of attempts to sent a command to the TRB before a timeout /RO]]></comment> |
| 522 |
|
|
</var> |
| 523 |
|
|
|
| 524 |
|
|
<var> |
| 525 |
|
|
<name>PWR_KHB_INITBOARD_TWICE_DELAY</name> |
| 526 |
|
|
<idx>55</idx> |
| 527 |
|
|
<location>3</location> |
| 528 |
|
|
<default>500</default> |
| 529 |
|
|
<comment><![CDATA[milliseconds to wait between two KHB Init Board in PWR_DcdcON /RO]]></comment> |
| 530 |
|
|
</var> |
| 531 |
|
|
|
| 532 |
|
|
<var> |
| 533 |
|
|
<name>PWR_IPM_WAIT_OK_N_ATTEMPT</name> |
| 534 |
|
|
<idx>56</idx> |
| 535 |
|
|
<location>3</location> |
| 536 |
|
|
<default>150</default> |
| 537 |
|
|
<comment><![CDATA[attempts of ipm check ok at power on /RO]]></comment> |
| 538 |
|
|
</var> |
| 539 |
|
|
|
| 540 |
|
|
<var> |
| 541 |
|
|
<name>PWR_IPM_WAIT_OK_DELAY_ATTEMPT</name> |
| 542 |
|
|
<idx>57</idx> |
| 543 |
|
|
<location>3</location> |
| 544 |
|
|
<default>1000</default> |
| 545 |
|
|
<comment><![CDATA[attempts of ipm check ok at power on /RO]]></comment> |
| 546 |
|
|
</var> |
| 547 |
|
|
|
| 548 |
|
|
<var> |
| 549 |
|
|
<name>PWR_VOLTAGE_N_ATTEMPT</name> |
| 550 |
|
|
<idx>58</idx> |
| 551 |
|
|
<location>3</location> |
| 552 |
|
|
<default>10</default> |
| 553 |
|
|
<comment><![CDATA[no of millisecond to wait in VOLTAGE IPM procedure /RO]]></comment> |
| 554 |
|
|
</var> |
| 555 |
|
|
|
| 556 |
|
|
<var> |
| 557 |
|
|
<name>PWR_VOLTAGE_DELAY_ATTEMPT</name> |
| 558 |
|
|
<idx>59</idx> |
| 559 |
|
|
<location>3</location> |
| 560 |
|
|
<default>1000</default> |
| 561 |
|
|
<comment><![CDATA[no of millisecond to wain in VOLTAGE IPM procedure /RO]]></comment> |
| 562 |
|
|
</var> |
| 563 |
|
|
|
| 564 |
|
|
<arr> |
| 565 |
|
|
<name>PWR_VOLTAGE_IPM_RANGE_ON_MAX</name> |
| 566 |
|
|
<n>6</n> |
| 567 |
|
|
<idx>8</idx> |
| 568 |
|
|
<location>3</location> |
| 569 |
|
|
<default>{0xd4,0xd4,0xd4,0xd4,0xd4,0xd4}</default> |
| 570 |
|
|
<comment><![CDATA[ADC min voltage values if ON /RO]]></comment> |
| 571 |
|
|
</arr> |
| 572 |
|
|
|
| 573 |
|
|
<arr> |
| 574 |
|
|
<name>PWR_VOLTAGE_IPM_RANGE_ON_MIN</name> |
| 575 |
|
|
<n>6</n> |
| 576 |
|
|
<idx>9</idx> |
| 577 |
|
|
<location>3</location> |
| 578 |
|
|
<default>{0x9e,0x9e,0x9e,0x9e,0x9e,0x9e}</default> |
| 579 |
|
|
<comment><![CDATA[ADC min voltage values if ON /RO]]></comment> |
| 580 |
|
|
</arr> |
| 581 |
|
|
|
| 582 |
|
|
<arr> |
| 583 |
|
|
<name>PWR_VOLTAGE_IPM_RANGE_OFF_MAX</name> |
| 584 |
|
|
<n>6</n> |
| 585 |
|
|
<idx>10</idx> |
| 586 |
|
|
<location>3</location> |
| 587 |
|
|
<default>{0x20,0x20,0x20,0x20,0x20,0x20}</default> |
| 588 |
|
|
<comment><![CDATA[ADC min voltage values if OFF /RO]]></comment> |
| 589 |
|
|
</arr> |
| 590 |
|
|
|
| 591 |
|
|
<arr> |
| 592 |
|
|
<name>PWR_VOLTAGE_IPM_RANGE_OFF_MIN</name> |
| 593 |
|
|
<n>6</n> |
| 594 |
|
|
<idx>11</idx> |
| 595 |
|
|
<location>3</location> |
| 596 |
|
|
<default>{ 0, 0, 0, 0, 0, 0}</default> |
| 597 |
|
|
<comment><![CDATA[ADC min voltage values if OFF /RO]]></comment> |
| 598 |
|
|
</arr> |
| 599 |
|
|
|
| 600 |
|
|
<var> |
| 601 |
|
|
<name>PWR_TRB1_SET</name> |
| 602 |
|
|
<idx>60</idx> |
| 603 |
|
|
<location>3</location> |
| 604 |
|
|
<default>16383</default> |
| 605 |
|
|
<comment><![CDATA[trb 1 setting /RO]]></comment> |
| 606 |
|
|
</var> |
| 607 |
|
|
|
| 608 |
|
|
<var> |
| 609 |
|
|
<name>PWR_TRB2_SET</name> |
| 610 |
|
|
<idx>61</idx> |
| 611 |
|
|
<location>3</location> |
| 612 |
|
|
<default>16383</default> |
| 613 |
|
|
<comment><![CDATA[trb 2 setting /RO]]></comment> |
| 614 |
|
|
</var> |
| 615 |
|
|
|
| 616 |
|
|
<var> |
| 617 |
|
|
<name>PWR_TRB_SET_DELAY</name> |
| 618 |
|
|
<idx>62</idx> |
| 619 |
|
|
<location>3</location> |
| 620 |
|
|
<default>20</default> |
| 621 |
|
|
<comment><![CDATA[delay after trb set cmd /RO]]></comment> |
| 622 |
|
|
</var> |
| 623 |
|
|
|
| 624 |
|
|
<var> |
| 625 |
|
|
<name>PWR_TRB_READ_DELAY</name> |
| 626 |
|
|
<idx>63</idx> |
| 627 |
|
|
<location>3</location> |
| 628 |
|
|
<default>20</default> |
| 629 |
|
|
<comment><![CDATA[delay after trb read cmd /RO]]></comment> |
| 630 |
|
|
</var> |
| 631 |
|
|
|
| 632 |
|
|
<tab> |
| 633 |
|
|
<name>PWR_IPM_ACTION</name> |
| 634 |
|
|
<rows>3</rows> |
| 635 |
|
|
<cols>64</cols> |
| 636 |
|
|
<idx>1</idx> |
| 637 |
|
|
<location>3</location> |
| 638 |
|
|
<default>{ |
| 639 |
|
|
/* format is: |
| 640 |
|
|
index0 is the couple of ipm (see typedef PWR_IPM3) |
| 641 |
|
|
index1 codes the following info (6 bit map) |
| 642 |
|
|
bit 0: CC[ipm1] read on TM port |
| 643 |
|
|
bit 1: CC[ipm1] read on TM port |
| 644 |
|
|
bit 2: ADC[ipm1] read on TM port |
| 645 |
|
|
bit 3: ADC[ipm2] read on TM port |
| 646 |
|
|
bit 3: PWR_IPM_CONF[ipm1] |
| 647 |
|
|
bit 4: PWR_IPM_CONF[ipm2] |
| 648 |
|
|
|
| 649 |
|
|
Values are coded followind this convetions: |
| 650 |
|
|
bit 8 IPM_TRB (CM_HOT,CM_COLD) |
| 651 |
|
|
bit 4-7 Action (see typedef PWR_IPM_ACTION) |
| 652 |
|
|
bit 0-3 TimeOutAction (seet typedef PWR_IPM_TO_ACTION) |
| 653 |
|
|
|
| 654 |
|
|
typedef enum { |
| 655 |
|
|
PWR_IPM_TO_ACTION_STOP, |
| 656 |
|
|
PWR_IPM_TO_ACTION_CONTINUE, |
| 657 |
|
|
} PWR_IPM_TO_ACTION; |
| 658 |
|
|
|
| 659 |
|
|
typedef enum { |
| 660 |
|
|
PWR_IPM_ACTION_ON_HOT, |
| 661 |
|
|
PWR_IPM_ACTION_ON_COLD, |
| 662 |
|
|
PWR_IPM_ACTION_ON_TOGGLED, |
| 663 |
|
|
PWR_IPM_ACTION_OFF, |
| 664 |
|
|
PWR_IPM_ACTION_EXIT_OK, |
| 665 |
|
|
PWR_IPM_ACTION_EXIT_BAD, |
| 666 |
|
|
} PWR_IPM_ACTION; |
| 667 |
|
|
|
| 668 |
|
|
typedef enum |
| 669 |
|
|
{ |
| 670 |
|
|
CM_HOT, |
| 671 |
|
|
CM_COLD, |
| 672 |
|
|
CM_HOT_COLD_MAX |
| 673 |
|
|
} CM_HOT_COLD; |
| 674 |
|
|
|
| 675 |
|
|
|
| 676 |
|
|
*/ |
| 677 |
|
|
#include "PWR_IPMActionTable.h" |
| 678 |
|
|
, |
| 679 |
|
|
#include "PWR_IPMActionTable.h" |
| 680 |
|
|
, |
| 681 |
|
|
#include "PWR_IPMActionTable.h" |
| 682 |
|
|
|
| 683 |
|
|
}</default> |
| 684 |
|
|
<comment><![CDATA[Main Table for actions to be done in IPM Check procedure]]></comment> |
| 685 |
|
|
</tab> |
| 686 |
|
|
|
| 687 |
|
|
<var> |
| 688 |
|
|
<name>HB_N_ATTEMPT_WRITE2PIF</name> |
| 689 |
|
|
<idx>64</idx> |
| 690 |
|
|
<location>3</location> |
| 691 |
|
|
<default>2</default> |
| 692 |
|
|
<comment><![CDATA[Number of attempt to write on PIF after return an error /RO]]></comment> |
| 693 |
|
|
</var> |
| 694 |
|
|
|
| 695 |
|
|
<var> |
| 696 |
|
|
<name>HB_WAIT_ON_FAILED_ATTEMPT_WRITE2PIF</name> |
| 697 |
|
|
<idx>65</idx> |
| 698 |
|
|
<location>3</location> |
| 699 |
|
|
<default>100</default> |
| 700 |
|
|
<comment><![CDATA[Waint time after a failed attempt on PIF write /RO]]></comment> |
| 701 |
|
|
</var> |
| 702 |
|
|
|
| 703 |
|
|
<var> |
| 704 |
|
|
<name>HB_WRITE2PIF_TIMEOUT</name> |
| 705 |
|
|
<idx>66</idx> |
| 706 |
|
|
<location>3</location> |
| 707 |
|
|
<default>1000</default> |
| 708 |
|
|
<comment><![CDATA[timeout time time to wait a sketchboard free in Write2PIF /RO]]></comment> |
| 709 |
|
|
</var> |
| 710 |
|
|
|
| 711 |
|
|
<var> |
| 712 |
|
|
<name>HB_ALMOST_FULL</name> |
| 713 |
|
|
<idx>67</idx> |
| 714 |
|
|
<location>3</location> |
| 715 |
|
|
<default>80</default> |
| 716 |
|
|
<comment><![CDATA[says when a specific internal buffer is condierered almost full and a FLUSH_HB request can be done. Unit is a percentage. /RM]]></comment> |
| 717 |
|
|
</var> |
| 718 |
|
|
|
| 719 |
|
|
<arr> |
| 720 |
|
|
<name>TM_FILTER_OPERATION</name> |
| 721 |
|
|
<n>78</n> |
| 722 |
|
|
<idx>12</idx> |
| 723 |
|
|
<location>3</location> |
| 724 |
|
|
<default>{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}</default> |
| 725 |
|
|
<comment><![CDATA[low level telemetry filter operation: 0->apply no filter 1->set value 2->ORed mask 3->ANDed mask /RO]]></comment> |
| 726 |
|
|
</arr> |
| 727 |
|
|
|
| 728 |
|
|
<arr> |
| 729 |
|
|
<name>TM_FILTER_VALUE</name> |
| 730 |
|
|
<n>78</n> |
| 731 |
|
|
<idx>13</idx> |
| 732 |
|
|
<location>3</location> |
| 733 |
|
|
<default>{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}</default> |
| 734 |
|
|
<comment><![CDATA[low level telemetry filted values /RO]]></comment> |
| 735 |
|
|
</arr> |
| 736 |
|
|
|
| 737 |
|
|
<var> |
| 738 |
|
|
<name>TM_VRL_SUSPEND_HCL</name> |
| 739 |
|
|
<idx>68</idx> |
| 740 |
|
|
<location>3</location> |
| 741 |
|
|
<default>110</default> |
| 742 |
|
|
<comment><![CDATA[wait time between two HCL commands for the VRL /RO]]></comment> |
| 743 |
|
|
</var> |
| 744 |
|
|
|
| 745 |
|
|
<var> |
| 746 |
|
|
<name>TM_VRL_SUSPEND_BEFORE_START</name> |
| 747 |
|
|
<idx>69</idx> |
| 748 |
|
|
<location>3</location> |
| 749 |
|
|
<default>1</default> |
| 750 |
|
|
<comment><![CDATA[wait time before start VRL /RO]]></comment> |
| 751 |
|
|
</var> |
| 752 |
|
|
|
| 753 |
|
|
<var> |
| 754 |
|
|
<name>DAQ_EVENT_RECEIVE_TIMEOUT</name> |
| 755 |
|
|
<idx>70</idx> |
| 756 |
|
|
<location>3</location> |
| 757 |
|
|
<default>20000</default> |
| 758 |
|
|
<comment><![CDATA[PIF Timeout of DAQ_SendCmd2PIFWaitDAQReply /RO]]></comment> |
| 759 |
|
|
</var> |
| 760 |
|
|
|
| 761 |
|
|
<var> |
| 762 |
|
|
<name>DAQ_WAITFREECMDIF_N</name> |
| 763 |
|
|
<idx>71</idx> |
| 764 |
|
|
<location>3</location> |
| 765 |
|
|
<default>4</default> |
| 766 |
|
|
<comment><![CDATA[Number of times the polling on SD_piGetCMDCounterLeft must be done before timeout when waiting the che CMDIF to be finisched /RO]]></comment> |
| 767 |
|
|
</var> |
| 768 |
|
|
|
| 769 |
|
|
<var> |
| 770 |
|
|
<name>TRB_OK</name> |
| 771 |
|
|
<idx>72</idx> |
| 772 |
|
|
<location>3</location> |
| 773 |
|
|
<default>1</default> |
| 774 |
|
|
<comment><![CDATA[Use ON_OFF tracker in ACQ /RO]]></comment> |
| 775 |
|
|
</var> |
| 776 |
|
|
|
| 777 |
|
|
<var> |
| 778 |
|
|
<name>TRIGGER_MODE_A</name> |
| 779 |
|
|
<idx>73</idx> |
| 780 |
|
|
<location>3</location> |
| 781 |
|
|
<default>1</default> |
| 782 |
|
|
<comment><![CDATA[Trigger type for acq mode A /RO]]></comment> |
| 783 |
|
|
</var> |
| 784 |
|
|
|
| 785 |
|
|
<var> |
| 786 |
|
|
<name>TRIGGER_MODE_B</name> |
| 787 |
|
|
<idx>74</idx> |
| 788 |
|
|
<location>3</location> |
| 789 |
|
|
<default>3</default> |
| 790 |
|
|
<comment><![CDATA[Trigger type for acq mode B /RO]]></comment> |
| 791 |
|
|
</var> |
| 792 |
|
|
|
| 793 |
|
|
<var> |
| 794 |
|
|
<name>TRIGGER_BUSY_CONTROL</name> |
| 795 |
|
|
<idx>75</idx> |
| 796 |
|
|
<location>3</location> |
| 797 |
|
|
<default>0</default> |
| 798 |
|
|
<comment><![CDATA[Select the check mask of the busy alaarm /RO]]></comment> |
| 799 |
|
|
</var> |
| 800 |
|
|
|
| 801 |
|
|
<var> |
| 802 |
|
|
<name>TB_LINK</name> |
| 803 |
|
|
<idx>76</idx> |
| 804 |
|
|
<location>2</location> |
| 805 |
|
|
<default>1</default> |
| 806 |
|
|
<comment><![CDATA[Trigger Board to use 1 or 2 /RO]]></comment> |
| 807 |
|
|
</var> |
| 808 |
|
|
|
| 809 |
|
|
<var> |
| 810 |
|
|
<name>TB_LINK_CUSTOM</name> |
| 811 |
|
|
<idx>77</idx> |
| 812 |
|
|
<location>3</location> |
| 813 |
|
|
<default>1</default> |
| 814 |
|
|
<comment><![CDATA[Trigger Board CUSTOMto use 1 or 2 /RO]]></comment> |
| 815 |
|
|
</var> |
| 816 |
|
|
|
| 817 |
|
|
<var> |
| 818 |
|
|
<name>BUF_LEN_TB_SET_ALARM_MASK</name> |
| 819 |
|
|
<idx>78</idx> |
| 820 |
|
|
<location>3</location> |
| 821 |
|
|
<default>8</default> |
| 822 |
|
|
<comment><![CDATA[TRG queue]]></comment> |
| 823 |
|
|
</var> |
| 824 |
|
|
|
| 825 |
|
|
<arr> |
| 826 |
|
|
<name>BUF_TB_SET_ALARM_MASK</name> |
| 827 |
|
|
<n>2</n> |
| 828 |
|
|
<idx>14</idx> |
| 829 |
|
|
<location>3</location> |
| 830 |
|
|
<default>{0x20000283,0x64FFFF24}</default> |
| 831 |
|
|
<comment><![CDATA[TRG queue]]></comment> |
| 832 |
|
|
</arr> |
| 833 |
|
|
|
| 834 |
|
|
<var> |
| 835 |
|
|
<name>BUF_LEN_TB_SET_PMT_MASK</name> |
| 836 |
|
|
<idx>79</idx> |
| 837 |
|
|
<location>3</location> |
| 838 |
|
|
<default>12</default> |
| 839 |
|
|
<comment><![CDATA[TRG queue]]></comment> |
| 840 |
|
|
</var> |
| 841 |
|
|
|
| 842 |
|
|
<arr> |
| 843 |
|
|
<name>BUF_TB_SET_PMT_MASK</name> |
| 844 |
|
|
<n>3</n> |
| 845 |
|
|
<idx>15</idx> |
| 846 |
|
|
<location>3</location> |
| 847 |
|
|
<default>{0x30000601,0xD0FFFFFF,0xFFFFFF48}</default> |
| 848 |
|
|
<comment><![CDATA[TRG queue]]></comment> |
| 849 |
|
|
</arr> |
| 850 |
|
|
|
| 851 |
|
|
<var> |
| 852 |
|
|
<name>BUF_LEN_TB_SET_S4_CAL_MASK</name> |
| 853 |
|
|
<idx>80</idx> |
| 854 |
|
|
<location>3</location> |
| 855 |
|
|
<default>7</default> |
| 856 |
|
|
<comment><![CDATA[TRG queue]]></comment> |
| 857 |
|
|
</var> |
| 858 |
|
|
|
| 859 |
|
|
<arr> |
| 860 |
|
|
<name>BUF_TB_SET_S4_CAL_MASK</name> |
| 861 |
|
|
<n>2</n> |
| 862 |
|
|
<idx>16</idx> |
| 863 |
|
|
<location>3</location> |
| 864 |
|
|
<default>{0x20000181,0x55FFF300}</default> |
| 865 |
|
|
<comment><![CDATA[TRG queue]]></comment> |
| 866 |
|
|
</arr> |
| 867 |
|
|
|
| 868 |
|
|
<var> |
| 869 |
|
|
<name>BUF_LEN_TB_SET_BUSY_MASK_IDAQ_HOT</name> |
| 870 |
|
|
<idx>81</idx> |
| 871 |
|
|
<location>3</location> |
| 872 |
|
|
<default>9</default> |
| 873 |
|
|
<comment><![CDATA[ ]]></comment> |
| 874 |
|
|
</var> |
| 875 |
|
|
|
| 876 |
|
|
<arr> |
| 877 |
|
|
<name>BUF_TB_SET_BUSY_MASK_IDAQ_HOT</name> |
| 878 |
|
|
<n>5</n> |
| 879 |
|
|
<idx>17</idx> |
| 880 |
|
|
<location>3</location> |
| 881 |
|
|
<default>{0x20000382,0x76800000,0x0B000000}</default> |
| 882 |
|
|
<comment><![CDATA[ ]]></comment> |
| 883 |
|
|
</arr> |
| 884 |
|
|
|
| 885 |
|
|
<var> |
| 886 |
|
|
<name>BUF_LEN_TB_SET_BUSY_MASK_IDAQ_COLD</name> |
| 887 |
|
|
<idx>82</idx> |
| 888 |
|
|
<location>3</location> |
| 889 |
|
|
<default>9</default> |
| 890 |
|
|
<comment><![CDATA[ ]]></comment> |
| 891 |
|
|
</var> |
| 892 |
|
|
|
| 893 |
|
|
<arr> |
| 894 |
|
|
<name>BUF_TB_SET_BUSY_MASK_IDAQ_COLD</name> |
| 895 |
|
|
<n>5</n> |
| 896 |
|
|
<idx>18</idx> |
| 897 |
|
|
<location>3</location> |
| 898 |
|
|
<default>{0x20000382,0x76400000,0x86000000}</default> |
| 899 |
|
|
<comment><![CDATA[ ]]></comment> |
| 900 |
|
|
</arr> |
| 901 |
|
|
|
| 902 |
|
|
<var> |
| 903 |
|
|
<name>TRK_OK</name> |
| 904 |
|
|
<idx>83</idx> |
| 905 |
|
|
<location>3</location> |
| 906 |
|
|
<default>1</default> |
| 907 |
|
|
<comment><![CDATA[Use ON_OFF tracker in ACQ /RO]]></comment> |
| 908 |
|
|
</var> |
| 909 |
|
|
|
| 910 |
|
|
<tab> |
| 911 |
|
|
<name>TRK_DSP_OK</name> |
| 912 |
|
|
<rows>2</rows> |
| 913 |
|
|
<cols>6</cols> |
| 914 |
|
|
<idx>2</idx> |
| 915 |
|
|
<location>3</location> |
| 916 |
|
|
<default>{{1,1,1,1,1,1},{1,1,1,1,1,1}}</default> |
| 917 |
|
|
<comment><![CDATA[Tracker dsp ON_OFF in ACQ /RO]]></comment> |
| 918 |
|
|
</tab> |
| 919 |
|
|
|
| 920 |
|
|
<var> |
| 921 |
|
|
<name>TRK_CALIB_MODE</name> |
| 922 |
|
|
<idx>84</idx> |
| 923 |
|
|
<location>3</location> |
| 924 |
|
|
<default>1</default> |
| 925 |
|
|
<comment><![CDATA[Tracker calibration mode /RO]]></comment> |
| 926 |
|
|
</var> |
| 927 |
|
|
|
| 928 |
|
|
<var> |
| 929 |
|
|
<name>TRK_TIME_SHORT</name> |
| 930 |
|
|
<idx>85</idx> |
| 931 |
|
|
<location>3</location> |
| 932 |
|
|
<default>13</default> |
| 933 |
|
|
<comment><![CDATA[Tracker wait loop for 128 loop /RO]]></comment> |
| 934 |
|
|
</var> |
| 935 |
|
|
|
| 936 |
|
|
<var> |
| 937 |
|
|
<name>TRK_TIME_LONG</name> |
| 938 |
|
|
<idx>86</idx> |
| 939 |
|
|
<location>3</location> |
| 940 |
|
|
<default>0</default> |
| 941 |
|
|
<comment><![CDATA[Tracker wait loop for 8 loop /RO]]></comment> |
| 942 |
|
|
</var> |
| 943 |
|
|
|
| 944 |
|
|
<tab> |
| 945 |
|
|
<name>TRK_DSP_MASK</name> |
| 946 |
|
|
<rows>2</rows> |
| 947 |
|
|
<cols>6</cols> |
| 948 |
|
|
<idx>3</idx> |
| 949 |
|
|
<location>3</location> |
| 950 |
|
|
<default>{{0,0,0,0,0,0},{0,0,0,0,0,0}}</default> |
| 951 |
|
|
<comment><![CDATA[Traker dsp mask /RO]]></comment> |
| 952 |
|
|
</tab> |
| 953 |
|
|
|
| 954 |
|
|
<arr> |
| 955 |
|
|
<name>TRK_LOAD_PRG</name> |
| 956 |
|
|
<n>2</n> |
| 957 |
|
|
<idx>19</idx> |
| 958 |
|
|
<location>3</location> |
| 959 |
|
|
<default>{3,3}</default> |
| 960 |
|
|
<comment><![CDATA[The way the DSP program is loaded /RO]]></comment> |
| 961 |
|
|
</arr> |
| 962 |
|
|
|
| 963 |
|
|
<var> |
| 964 |
|
|
<name>TRK_CALIB_INIT</name> |
| 965 |
|
|
<idx>87</idx> |
| 966 |
|
|
<location>3</location> |
| 967 |
|
|
<default>104</default> |
| 968 |
|
|
<comment><![CDATA[modality of calibration /RO]]></comment> |
| 969 |
|
|
</var> |
| 970 |
|
|
|
| 971 |
|
|
<var> |
| 972 |
|
|
<name>TRK_NLOOP</name> |
| 973 |
|
|
<idx>88</idx> |
| 974 |
|
|
<location>3</location> |
| 975 |
|
|
<default>12</default> |
| 976 |
|
|
<comment><![CDATA[macro loop number /RO]]></comment> |
| 977 |
|
|
</var> |
| 978 |
|
|
|
| 979 |
|
|
<tab> |
| 980 |
|
|
<name>TRK_PED_MIN_0</name> |
| 981 |
|
|
<rows>3</rows> |
| 982 |
|
|
<cols>6</cols> |
| 983 |
|
|
<idx>4</idx> |
| 984 |
|
|
<location>3</location> |
| 985 |
|
|
<default>{{100,100,100,100,100,100},{100,100,100,100,100,100},{100,100,100,100,100,100}}</default> |
| 986 |
|
|
<comment><![CDATA[Tracker 0 ped min value /RO]]></comment> |
| 987 |
|
|
</tab> |
| 988 |
|
|
|
| 989 |
|
|
<tab> |
| 990 |
|
|
<name>TRK_PED_MIN_1</name> |
| 991 |
|
|
<rows>3</rows> |
| 992 |
|
|
<cols>6</cols> |
| 993 |
|
|
<idx>5</idx> |
| 994 |
|
|
<location>3</location> |
| 995 |
|
|
<default>{{100,100,100,100,100,100},{100,100,100,100,100,100},{100,100,100,100,100,100}}</default> |
| 996 |
|
|
<comment><![CDATA[Tracker 1 ped min value /RO]]></comment> |
| 997 |
|
|
</tab> |
| 998 |
|
|
|
| 999 |
|
|
<tab> |
| 1000 |
|
|
<name>TRK_PED_MAX_0</name> |
| 1001 |
|
|
<rows>3</rows> |
| 1002 |
|
|
<cols>6</cols> |
| 1003 |
|
|
<idx>6</idx> |
| 1004 |
|
|
<location>3</location> |
| 1005 |
|
|
<default>{{4000,4000,4000,4000,4000,4000},{4000,4000,4000,4000,4000,4000},{4000,4000,4000,4000,4000,4000}}</default> |
| 1006 |
|
|
<comment><![CDATA[Tracker 0 ped max value /RO]]></comment> |
| 1007 |
|
|
</tab> |
| 1008 |
|
|
|
| 1009 |
|
|
<tab> |
| 1010 |
|
|
<name>TRK_PED_MAX_1</name> |
| 1011 |
|
|
<rows>3</rows> |
| 1012 |
|
|
<cols>6</cols> |
| 1013 |
|
|
<idx>7</idx> |
| 1014 |
|
|
<location>3</location> |
| 1015 |
|
|
<default>{{4000,4000,4000,4000,4000,4000},{4000,4000,4000,4000,4000,4000},{4000,4000,4000,4000,4000,4000}}</default> |
| 1016 |
|
|
<comment><![CDATA[Tracker 1 ped max value /RO]]></comment> |
| 1017 |
|
|
</tab> |
| 1018 |
|
|
|
| 1019 |
|
|
<tab> |
| 1020 |
|
|
<name>TRK_SIG_MIN_0</name> |
| 1021 |
|
|
<rows>3</rows> |
| 1022 |
|
|
<cols>6</cols> |
| 1023 |
|
|
<idx>8</idx> |
| 1024 |
|
|
<location>3</location> |
| 1025 |
|
|
<default>{{1,1,1,1,1,1},{1,1,1,1,1,1},{1,1,1,1,1,1}}</default> |
| 1026 |
|
|
<comment><![CDATA[Tracker 0 sig min value /RO]]></comment> |
| 1027 |
|
|
</tab> |
| 1028 |
|
|
|
| 1029 |
|
|
<tab> |
| 1030 |
|
|
<name>TRK_SIG_MIN_1</name> |
| 1031 |
|
|
<rows>3</rows> |
| 1032 |
|
|
<cols>6</cols> |
| 1033 |
|
|
<idx>9</idx> |
| 1034 |
|
|
<location>3</location> |
| 1035 |
|
|
<default>{{1,1,1,1,1,1},{1,1,1,1,1,1},{1,1,1,1,1,1}}</default> |
| 1036 |
|
|
<comment><![CDATA[Tracker 1 sig min value /RO]]></comment> |
| 1037 |
|
|
</tab> |
| 1038 |
|
|
|
| 1039 |
|
|
<tab> |
| 1040 |
|
|
<name>TRK_SIG_MAX_0</name> |
| 1041 |
|
|
<rows>3</rows> |
| 1042 |
|
|
<cols>6</cols> |
| 1043 |
|
|
<idx>10</idx> |
| 1044 |
|
|
<location>3</location> |
| 1045 |
|
|
<default>{{100,100,100,100,100,100},{100,100,100,100,100,100},{100,100,100,100,100,100}}</default> |
| 1046 |
|
|
<comment><![CDATA[Tracker 0 sig min value /RO]]></comment> |
| 1047 |
|
|
</tab> |
| 1048 |
|
|
|
| 1049 |
|
|
<tab> |
| 1050 |
|
|
<name>TRK_SIG_MAX_1</name> |
| 1051 |
|
|
<rows>3</rows> |
| 1052 |
|
|
<cols>6</cols> |
| 1053 |
|
|
<idx>11</idx> |
| 1054 |
|
|
<location>3</location> |
| 1055 |
|
|
<default>{{100,100,100,100,100,100},{100,100,100,100,100,100},{100,100,100,100,100,100}}</default> |
| 1056 |
|
|
<comment><![CDATA[Tracker 1 sig min value /RO]]></comment> |
| 1057 |
|
|
</tab> |
| 1058 |
|
|
|
| 1059 |
|
|
<tab> |
| 1060 |
|
|
<name>TRK_BAD_MAX_0</name> |
| 1061 |
|
|
<rows>3</rows> |
| 1062 |
|
|
<cols>6</cols> |
| 1063 |
|
|
<idx>12</idx> |
| 1064 |
|
|
<location>3</location> |
| 1065 |
|
|
<default>{{512,512,512,512,512,512},{512,512,512,512,512,512},{512,512,512,512,512,512}}</default> |
| 1066 |
|
|
<comment><![CDATA[Tracker 0 bad max value /RO]]></comment> |
| 1067 |
|
|
</tab> |
| 1068 |
|
|
|
| 1069 |
|
|
<tab> |
| 1070 |
|
|
<name>TRK_BAD_MAX_1</name> |
| 1071 |
|
|
<rows>3</rows> |
| 1072 |
|
|
<cols>6</cols> |
| 1073 |
|
|
<idx>13</idx> |
| 1074 |
|
|
<location>3</location> |
| 1075 |
|
|
<default>{{512,512,512,512,512,512},{512,512,512,512,512,512},{512,512,512,512,512,512}}</default> |
| 1076 |
|
|
<comment><![CDATA[Tracker 1 bad max value /RO]]></comment> |
| 1077 |
|
|
</tab> |
| 1078 |
|
|
|
| 1079 |
|
|
<var> |
| 1080 |
|
|
<name>BUF_LEN_TRK_PROGRAM</name> |
| 1081 |
|
|
<idx>89</idx> |
| 1082 |
|
|
<location>1</location> |
| 1083 |
|
|
<default>10644</default> |
| 1084 |
|
|
<comment><![CDATA[TRK DSP Program /RO]]></comment> |
| 1085 |
|
|
</var> |
| 1086 |
|
|
|
| 1087 |
|
|
<arr> |
| 1088 |
|
|
<name>BUF_TRK_PROGRAM</name> |
| 1089 |
|
|
<n>3000</n> |
| 1090 |
|
|
<idx>20</idx> |
| 1091 |
|
|
<location>1</location> |
| 1092 |
|
|
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|
| 1093 |
|
|
<comment><![CDATA[TRK DSP Program /RO]]></comment> |
| 1094 |
|
|
</arr> |
| 1095 |
|
|
|
| 1096 |
|
|
<var> |
| 1097 |
|
|
<name>BUF_LEN_TRK_TRAILER_PRG_0</name> |
| 1098 |
|
|
<idx>90</idx> |
| 1099 |
|
|
<location>3</location> |
| 1100 |
|
|
<default>1</default> |
| 1101 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 0 /RO]]></comment> |
| 1102 |
|
|
</var> |
| 1103 |
|
|
|
| 1104 |
|
|
<arr> |
| 1105 |
|
|
<name>BUF_TRK_TRAILER_PRG_0</name> |
| 1106 |
|
|
<n>3</n> |
| 1107 |
|
|
<idx>21</idx> |
| 1108 |
|
|
<location>3</location> |
| 1109 |
|
|
<default>{0x79000000}</default> |
| 1110 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 0 /RO]]></comment> |
| 1111 |
|
|
</arr> |
| 1112 |
|
|
|
| 1113 |
|
|
<var> |
| 1114 |
|
|
<name>BUF_LEN_TRK_TRAILER_PRG_1</name> |
| 1115 |
|
|
<idx>91</idx> |
| 1116 |
|
|
<location>3</location> |
| 1117 |
|
|
<default>1</default> |
| 1118 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 1 /RO]]></comment> |
| 1119 |
|
|
</var> |
| 1120 |
|
|
|
| 1121 |
|
|
<arr> |
| 1122 |
|
|
<name>BUF_TRK_TRAILER_PRG_1</name> |
| 1123 |
|
|
<n>3</n> |
| 1124 |
|
|
<idx>22</idx> |
| 1125 |
|
|
<location>3</location> |
| 1126 |
|
|
<default>{0x9A000000}</default> |
| 1127 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 1 /RO]]></comment> |
| 1128 |
|
|
</arr> |
| 1129 |
|
|
|
| 1130 |
|
|
<var> |
| 1131 |
|
|
<name>BUF_LEN_TRK_TRAILER_PRG_2</name> |
| 1132 |
|
|
<idx>92</idx> |
| 1133 |
|
|
<location>3</location> |
| 1134 |
|
|
<default>1</default> |
| 1135 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 2 /RO]]></comment> |
| 1136 |
|
|
</var> |
| 1137 |
|
|
|
| 1138 |
|
|
<arr> |
| 1139 |
|
|
<name>BUF_TRK_TRAILER_PRG_2</name> |
| 1140 |
|
|
<n>3</n> |
| 1141 |
|
|
<idx>23</idx> |
| 1142 |
|
|
<location>3</location> |
| 1143 |
|
|
<default>{0xB8000000}</default> |
| 1144 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 2 /RO]]></comment> |
| 1145 |
|
|
</arr> |
| 1146 |
|
|
|
| 1147 |
|
|
<var> |
| 1148 |
|
|
<name>BUF_LEN_TRK_TRAILER_PRG_3</name> |
| 1149 |
|
|
<idx>93</idx> |
| 1150 |
|
|
<location>3</location> |
| 1151 |
|
|
<default>1</default> |
| 1152 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 3 /RO]]></comment> |
| 1153 |
|
|
</var> |
| 1154 |
|
|
|
| 1155 |
|
|
<arr> |
| 1156 |
|
|
<name>BUF_TRK_TRAILER_PRG_3</name> |
| 1157 |
|
|
<n>3</n> |
| 1158 |
|
|
<idx>24</idx> |
| 1159 |
|
|
<location>3</location> |
| 1160 |
|
|
<default>{0x5B000000}</default> |
| 1161 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 3 /RO]]></comment> |
| 1162 |
|
|
</arr> |
| 1163 |
|
|
|
| 1164 |
|
|
<var> |
| 1165 |
|
|
<name>BUF_LEN_TRK_TRAILER_PRG_4</name> |
| 1166 |
|
|
<idx>94</idx> |
| 1167 |
|
|
<location>3</location> |
| 1168 |
|
|
<default>1</default> |
| 1169 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 4 /RO]]></comment> |
| 1170 |
|
|
</var> |
| 1171 |
|
|
|
| 1172 |
|
|
<arr> |
| 1173 |
|
|
<name>BUF_TRK_TRAILER_PRG_4</name> |
| 1174 |
|
|
<n>3</n> |
| 1175 |
|
|
<idx>25</idx> |
| 1176 |
|
|
<location>3</location> |
| 1177 |
|
|
<default>{0xFC000000}</default> |
| 1178 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 4 /RO]]></comment> |
| 1179 |
|
|
</arr> |
| 1180 |
|
|
|
| 1181 |
|
|
<var> |
| 1182 |
|
|
<name>BUF_LEN_TRK_TRAILER_PRG_5</name> |
| 1183 |
|
|
<idx>95</idx> |
| 1184 |
|
|
<location>3</location> |
| 1185 |
|
|
<default>1</default> |
| 1186 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 5 /RO]]></comment> |
| 1187 |
|
|
</var> |
| 1188 |
|
|
|
| 1189 |
|
|
<arr> |
| 1190 |
|
|
<name>BUF_TRK_TRAILER_PRG_5</name> |
| 1191 |
|
|
<n>3</n> |
| 1192 |
|
|
<idx>26</idx> |
| 1193 |
|
|
<location>3</location> |
| 1194 |
|
|
<default>{0x1F000000}</default> |
| 1195 |
|
|
<comment><![CDATA[TRK DSP Program Trailer for DSP 5 /RO]]></comment> |
| 1196 |
|
|
</arr> |
| 1197 |
|
|
|
| 1198 |
|
|
<var> |
| 1199 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_1_0</name> |
| 1200 |
|
|
<idx>96</idx> |
| 1201 |
|
|
<location>3</location> |
| 1202 |
|
|
<default>30</default> |
| 1203 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1204 |
|
|
</var> |
| 1205 |
|
|
|
| 1206 |
|
|
<arr> |
| 1207 |
|
|
<name>BUF_TRK_NUMBER_DSP_1_0</name> |
| 1208 |
|
|
<n>10</n> |
| 1209 |
|
|
<idx>27</idx> |
| 1210 |
|
|
<location>3</location> |
| 1211 |
|
|
<default>{0x001B01C7,0x00730200,0x0C000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07940000}</default> |
| 1212 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1213 |
|
|
</arr> |
| 1214 |
|
|
|
| 1215 |
|
|
<var> |
| 1216 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_1_1</name> |
| 1217 |
|
|
<idx>97</idx> |
| 1218 |
|
|
<location>3</location> |
| 1219 |
|
|
<default>30</default> |
| 1220 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1221 |
|
|
</var> |
| 1222 |
|
|
|
| 1223 |
|
|
<arr> |
| 1224 |
|
|
<name>BUF_TRK_NUMBER_DSP_1_1</name> |
| 1225 |
|
|
<n>10</n> |
| 1226 |
|
|
<idx>28</idx> |
| 1227 |
|
|
<location>3</location> |
| 1228 |
|
|
<default>{0x001B11B7,0x00730200,0x0A000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07210000}</default> |
| 1229 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1230 |
|
|
</arr> |
| 1231 |
|
|
|
| 1232 |
|
|
<var> |
| 1233 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_1_2</name> |
| 1234 |
|
|
<idx>98</idx> |
| 1235 |
|
|
<location>3</location> |
| 1236 |
|
|
<default>30</default> |
| 1237 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1238 |
|
|
</var> |
| 1239 |
|
|
|
| 1240 |
|
|
<arr> |
| 1241 |
|
|
<name>BUF_TRK_NUMBER_DSP_1_2</name> |
| 1242 |
|
|
<n>10</n> |
| 1243 |
|
|
<idx>29</idx> |
| 1244 |
|
|
<location>3</location> |
| 1245 |
|
|
<default>{0x001B2127,0x00730200,0x08000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07CB0000}</default> |
| 1246 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1247 |
|
|
</arr> |
| 1248 |
|
|
|
| 1249 |
|
|
<var> |
| 1250 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_1_3</name> |
| 1251 |
|
|
<idx>99</idx> |
| 1252 |
|
|
<location>3</location> |
| 1253 |
|
|
<default>30</default> |
| 1254 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1255 |
|
|
</var> |
| 1256 |
|
|
|
| 1257 |
|
|
<arr> |
| 1258 |
|
|
<name>BUF_TRK_NUMBER_DSP_1_3</name> |
| 1259 |
|
|
<n>10</n> |
| 1260 |
|
|
<idx>30</idx> |
| 1261 |
|
|
<location>3</location> |
| 1262 |
|
|
<default>{0x001B3157,0x00730200,0x04000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07C30000}</default> |
| 1263 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1264 |
|
|
</arr> |
| 1265 |
|
|
|
| 1266 |
|
|
<var> |
| 1267 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_1_4</name> |
| 1268 |
|
|
<idx>100</idx> |
| 1269 |
|
|
<location>3</location> |
| 1270 |
|
|
<default>30</default> |
| 1271 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1272 |
|
|
</var> |
| 1273 |
|
|
|
| 1274 |
|
|
<arr> |
| 1275 |
|
|
<name>BUF_TRK_NUMBER_DSP_1_4</name> |
| 1276 |
|
|
<n>10</n> |
| 1277 |
|
|
<idx>31</idx> |
| 1278 |
|
|
<location>3</location> |
| 1279 |
|
|
<default>{0x001B4100,0x00730200,0x06000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07A50000}</default> |
| 1280 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1281 |
|
|
</arr> |
| 1282 |
|
|
|
| 1283 |
|
|
<var> |
| 1284 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_1_5</name> |
| 1285 |
|
|
<idx>101</idx> |
| 1286 |
|
|
<location>3</location> |
| 1287 |
|
|
<default>30</default> |
| 1288 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1289 |
|
|
</var> |
| 1290 |
|
|
|
| 1291 |
|
|
<arr> |
| 1292 |
|
|
<name>BUF_TRK_NUMBER_DSP_1_5</name> |
| 1293 |
|
|
<n>10</n> |
| 1294 |
|
|
<idx>32</idx> |
| 1295 |
|
|
<location>3</location> |
| 1296 |
|
|
<default>{0x001B5170,0x00730200,0x02000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x079F0000}</default> |
| 1297 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1298 |
|
|
</arr> |
| 1299 |
|
|
|
| 1300 |
|
|
<var> |
| 1301 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_2_0</name> |
| 1302 |
|
|
<idx>102</idx> |
| 1303 |
|
|
<location>3</location> |
| 1304 |
|
|
<default>30</default> |
| 1305 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1306 |
|
|
</var> |
| 1307 |
|
|
|
| 1308 |
|
|
<arr> |
| 1309 |
|
|
<name>BUF_TRK_NUMBER_DSP_2_0</name> |
| 1310 |
|
|
<n>10</n> |
| 1311 |
|
|
<idx>33</idx> |
| 1312 |
|
|
<location>3</location> |
| 1313 |
|
|
<default>{0x001B01C7,0x00730200,0x0B000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07C60000}</default> |
| 1314 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1315 |
|
|
</arr> |
| 1316 |
|
|
|
| 1317 |
|
|
<var> |
| 1318 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_2_1</name> |
| 1319 |
|
|
<idx>103</idx> |
| 1320 |
|
|
<location>3</location> |
| 1321 |
|
|
<default>30</default> |
| 1322 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1323 |
|
|
</var> |
| 1324 |
|
|
|
| 1325 |
|
|
<arr> |
| 1326 |
|
|
<name>BUF_TRK_NUMBER_DSP_2_1</name> |
| 1327 |
|
|
<n>10</n> |
| 1328 |
|
|
<idx>34</idx> |
| 1329 |
|
|
<location>3</location> |
| 1330 |
|
|
<default>{0x001B11B7,0x00730200,0x09000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x076A0000}</default> |
| 1331 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1332 |
|
|
</arr> |
| 1333 |
|
|
|
| 1334 |
|
|
<var> |
| 1335 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_2_2</name> |
| 1336 |
|
|
<idx>104</idx> |
| 1337 |
|
|
<location>3</location> |
| 1338 |
|
|
<default>30</default> |
| 1339 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1340 |
|
|
</var> |
| 1341 |
|
|
|
| 1342 |
|
|
<arr> |
| 1343 |
|
|
<name>BUF_TRK_NUMBER_DSP_2_2</name> |
| 1344 |
|
|
<n>10</n> |
| 1345 |
|
|
<idx>35</idx> |
| 1346 |
|
|
<location>3</location> |
| 1347 |
|
|
<default>{0x001B2127,0x00730200,0x07000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07AB0000}</default> |
| 1348 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1349 |
|
|
</arr> |
| 1350 |
|
|
|
| 1351 |
|
|
<var> |
| 1352 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_2_3</name> |
| 1353 |
|
|
<idx>105</idx> |
| 1354 |
|
|
<location>3</location> |
| 1355 |
|
|
<default>30</default> |
| 1356 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1357 |
|
|
</var> |
| 1358 |
|
|
|
| 1359 |
|
|
<arr> |
| 1360 |
|
|
<name>BUF_TRK_NUMBER_DSP_2_3</name> |
| 1361 |
|
|
<n>10</n> |
| 1362 |
|
|
<idx>36</idx> |
| 1363 |
|
|
<location>3</location> |
| 1364 |
|
|
<default>{0x001B3157,0x00730200,0x03000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07910000}</default> |
| 1365 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1366 |
|
|
</arr> |
| 1367 |
|
|
|
| 1368 |
|
|
<var> |
| 1369 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_2_4</name> |
| 1370 |
|
|
<idx>106</idx> |
| 1371 |
|
|
<location>3</location> |
| 1372 |
|
|
<default>30</default> |
| 1373 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1374 |
|
|
</var> |
| 1375 |
|
|
|
| 1376 |
|
|
<arr> |
| 1377 |
|
|
<name>BUF_TRK_NUMBER_DSP_2_4</name> |
| 1378 |
|
|
<n>10</n> |
| 1379 |
|
|
<idx>37</idx> |
| 1380 |
|
|
<location>3</location> |
| 1381 |
|
|
<default>{0x001B4100,0x00730200,0x05000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07EE0000}</default> |
| 1382 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1383 |
|
|
</arr> |
| 1384 |
|
|
|
| 1385 |
|
|
<var> |
| 1386 |
|
|
<name>BUF_LEN_TRK_NUMBER_DSP_2_5</name> |
| 1387 |
|
|
<idx>107</idx> |
| 1388 |
|
|
<location>3</location> |
| 1389 |
|
|
<default>30</default> |
| 1390 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1391 |
|
|
</var> |
| 1392 |
|
|
|
| 1393 |
|
|
<arr> |
| 1394 |
|
|
<name>BUF_TRK_NUMBER_DSP_2_5</name> |
| 1395 |
|
|
<n>10</n> |
| 1396 |
|
|
<idx>38</idx> |
| 1397 |
|
|
<location>3</location> |
| 1398 |
|
|
<default>{0x001B5170,0x00730200,0x01000400,0x07000200,0x01007F0C,0x0409607F,0xFF000500,0x07D40000}</default> |
| 1399 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1400 |
|
|
</arr> |
| 1401 |
|
|
|
| 1402 |
|
|
<var> |
| 1403 |
|
|
<name>BUF_LEN_TRK_OPMODE_COMP_0</name> |
| 1404 |
|
|
<idx>108</idx> |
| 1405 |
|
|
<location>3</location> |
| 1406 |
|
|
<default>10</default> |
| 1407 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1408 |
|
|
</var> |
| 1409 |
|
|
|
| 1410 |
|
|
<arr> |
| 1411 |
|
|
<name>BUF_TRK_OPMODE_COMP_0</name> |
| 1412 |
|
|
<n>3</n> |
| 1413 |
|
|
<idx>39</idx> |
| 1414 |
|
|
<location>3</location> |
| 1415 |
|
|
<default>{0x0007016C,0x00730100,0x0A6F0000}</default> |
| 1416 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1417 |
|
|
</arr> |
| 1418 |
|
|
|
| 1419 |
|
|
<var> |
| 1420 |
|
|
<name>BUF_LEN_TRK_OPMODE_SPEC_0</name> |
| 1421 |
|
|
<idx>109</idx> |
| 1422 |
|
|
<location>3</location> |
| 1423 |
|
|
<default>10</default> |
| 1424 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1425 |
|
|
</var> |
| 1426 |
|
|
|
| 1427 |
|
|
<arr> |
| 1428 |
|
|
<name>BUF_TRK_OPMODE_SPEC_0</name> |
| 1429 |
|
|
<n>3</n> |
| 1430 |
|
|
<idx>40</idx> |
| 1431 |
|
|
<location>3</location> |
| 1432 |
|
|
<default>{0x0007016C,0x00730100,0x08610000}</default> |
| 1433 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1434 |
|
|
</arr> |
| 1435 |
|
|
|
| 1436 |
|
|
<var> |
| 1437 |
|
|
<name>BUF_LEN_TRK_OPMODE_COMP_1</name> |
| 1438 |
|
|
<idx>110</idx> |
| 1439 |
|
|
<location>3</location> |
| 1440 |
|
|
<default>10</default> |
| 1441 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1442 |
|
|
</var> |
| 1443 |
|
|
|
| 1444 |
|
|
<arr> |
| 1445 |
|
|
<name>BUF_TRK_OPMODE_COMP_1</name> |
| 1446 |
|
|
<n>3</n> |
| 1447 |
|
|
<idx>41</idx> |
| 1448 |
|
|
<location>3</location> |
| 1449 |
|
|
<default>{0x0007111C,0x00730100,0x0AF10000}</default> |
| 1450 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1451 |
|
|
</arr> |
| 1452 |
|
|
|
| 1453 |
|
|
<var> |
| 1454 |
|
|
<name>BUF_LEN_TRK_OPMODE_SPEC_1</name> |
| 1455 |
|
|
<idx>111</idx> |
| 1456 |
|
|
<location>3</location> |
| 1457 |
|
|
<default>10</default> |
| 1458 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1459 |
|
|
</var> |
| 1460 |
|
|
|
| 1461 |
|
|
<arr> |
| 1462 |
|
|
<name>BUF_TRK_OPMODE_SPEC_1</name> |
| 1463 |
|
|
<n>3</n> |
| 1464 |
|
|
<idx>42</idx> |
| 1465 |
|
|
<location>3</location> |
| 1466 |
|
|
<default>{0x0007111C,0x00730100,0x08FF0000}</default> |
| 1467 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1468 |
|
|
</arr> |
| 1469 |
|
|
|
| 1470 |
|
|
<var> |
| 1471 |
|
|
<name>BUF_LEN_TRK_OPMODE_COMP_2</name> |
| 1472 |
|
|
<idx>112</idx> |
| 1473 |
|
|
<location>3</location> |
| 1474 |
|
|
<default>10</default> |
| 1475 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1476 |
|
|
</var> |
| 1477 |
|
|
|
| 1478 |
|
|
<arr> |
| 1479 |
|
|
<name>BUF_TRK_OPMODE_COMP_2</name> |
| 1480 |
|
|
<n>3</n> |
| 1481 |
|
|
<idx>43</idx> |
| 1482 |
|
|
<location>3</location> |
| 1483 |
|
|
<default>{0x0007218C,0x00730100,0x0A540000}</default> |
| 1484 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1485 |
|
|
</arr> |
| 1486 |
|
|
|
| 1487 |
|
|
<var> |
| 1488 |
|
|
<name>BUF_LEN_TRK_OPMODE_SPEC_2</name> |
| 1489 |
|
|
<idx>113</idx> |
| 1490 |
|
|
<location>3</location> |
| 1491 |
|
|
<default>10</default> |
| 1492 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1493 |
|
|
</var> |
| 1494 |
|
|
|
| 1495 |
|
|
<arr> |
| 1496 |
|
|
<name>BUF_TRK_OPMODE_SPEC_2</name> |
| 1497 |
|
|
<n>3</n> |
| 1498 |
|
|
<idx>44</idx> |
| 1499 |
|
|
<location>3</location> |
| 1500 |
|
|
<default>{0x0007218C,0x00730100,0x085A0000}</default> |
| 1501 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1502 |
|
|
</arr> |
| 1503 |
|
|
|
| 1504 |
|
|
<var> |
| 1505 |
|
|
<name>BUF_LEN_TRK_OPMODE_COMP_3</name> |
| 1506 |
|
|
<idx>114</idx> |
| 1507 |
|
|
<location>3</location> |
| 1508 |
|
|
<default>10</default> |
| 1509 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1510 |
|
|
</var> |
| 1511 |
|
|
|
| 1512 |
|
|
<arr> |
| 1513 |
|
|
<name>BUF_TRK_OPMODE_COMP_3</name> |
| 1514 |
|
|
<n>3</n> |
| 1515 |
|
|
<idx>45</idx> |
| 1516 |
|
|
<location>3</location> |
| 1517 |
|
|
<default>{0x000731FC,0x00730100,0x0ACA0000}</default> |
| 1518 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1519 |
|
|
</arr> |
| 1520 |
|
|
|
| 1521 |
|
|
<var> |
| 1522 |
|
|
<name>BUF_LEN_TRK_OPMODE_SPEC_3</name> |
| 1523 |
|
|
<idx>115</idx> |
| 1524 |
|
|
<location>3</location> |
| 1525 |
|
|
<default>10</default> |
| 1526 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1527 |
|
|
</var> |
| 1528 |
|
|
|
| 1529 |
|
|
<arr> |
| 1530 |
|
|
<name>BUF_TRK_OPMODE_SPEC_3</name> |
| 1531 |
|
|
<n>3</n> |
| 1532 |
|
|
<idx>46</idx> |
| 1533 |
|
|
<location>3</location> |
| 1534 |
|
|
<default>{0x000731FC,0x00730100,0x08C40000}</default> |
| 1535 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1536 |
|
|
</arr> |
| 1537 |
|
|
|
| 1538 |
|
|
<var> |
| 1539 |
|
|
<name>BUF_LEN_TRK_OPMODE_COMP_4</name> |
| 1540 |
|
|
<idx>116</idx> |
| 1541 |
|
|
<location>3</location> |
| 1542 |
|
|
<default>10</default> |
| 1543 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1544 |
|
|
</var> |
| 1545 |
|
|
|
| 1546 |
|
|
<arr> |
| 1547 |
|
|
<name>BUF_TRK_OPMODE_COMP_4</name> |
| 1548 |
|
|
<n>3</n> |
| 1549 |
|
|
<idx>47</idx> |
| 1550 |
|
|
<location>3</location> |
| 1551 |
|
|
<default>{0x000741AB,0x00730100,0x0A190000}</default> |
| 1552 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1553 |
|
|
</arr> |
| 1554 |
|
|
|
| 1555 |
|
|
<var> |
| 1556 |
|
|
<name>BUF_LEN_TRK_OPMODE_SPEC_4</name> |
| 1557 |
|
|
<idx>117</idx> |
| 1558 |
|
|
<location>3</location> |
| 1559 |
|
|
<default>10</default> |
| 1560 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1561 |
|
|
</var> |
| 1562 |
|
|
|
| 1563 |
|
|
<arr> |
| 1564 |
|
|
<name>BUF_TRK_OPMODE_SPEC_4</name> |
| 1565 |
|
|
<n>3</n> |
| 1566 |
|
|
<idx>48</idx> |
| 1567 |
|
|
<location>3</location> |
| 1568 |
|
|
<default>{0x000741AB,0x00730100,0x08170000}</default> |
| 1569 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1570 |
|
|
</arr> |
| 1571 |
|
|
|
| 1572 |
|
|
<var> |
| 1573 |
|
|
<name>BUF_LEN_TRK_OPMODE_COMP_5</name> |
| 1574 |
|
|
<idx>118</idx> |
| 1575 |
|
|
<location>3</location> |
| 1576 |
|
|
<default>10</default> |
| 1577 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1578 |
|
|
</var> |
| 1579 |
|
|
|
| 1580 |
|
|
<arr> |
| 1581 |
|
|
<name>BUF_TRK_OPMODE_COMP_5</name> |
| 1582 |
|
|
<n>3</n> |
| 1583 |
|
|
<idx>49</idx> |
| 1584 |
|
|
<location>3</location> |
| 1585 |
|
|
<default>{0x000751DB,0x00730100,0x0A870000}</default> |
| 1586 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1587 |
|
|
</arr> |
| 1588 |
|
|
|
| 1589 |
|
|
<var> |
| 1590 |
|
|
<name>BUF_LEN_TRK_OPMODE_SPEC_5</name> |
| 1591 |
|
|
<idx>119</idx> |
| 1592 |
|
|
<location>3</location> |
| 1593 |
|
|
<default>10</default> |
| 1594 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1595 |
|
|
</var> |
| 1596 |
|
|
|
| 1597 |
|
|
<arr> |
| 1598 |
|
|
<name>BUF_TRK_OPMODE_SPEC_5</name> |
| 1599 |
|
|
<n>3</n> |
| 1600 |
|
|
<idx>50</idx> |
| 1601 |
|
|
<location>3</location> |
| 1602 |
|
|
<default>{0x000751DB,0x00730100,0x08890000}</default> |
| 1603 |
|
|
<comment><![CDATA[TRK command queue /RO]]></comment> |
| 1604 |
|
|
</arr> |
| 1605 |
|
|
|
| 1606 |
|
|
<var> |
| 1607 |
|
|
<name>S4_OK</name> |
| 1608 |
|
|
<idx>120</idx> |
| 1609 |
|
|
<location>3</location> |
| 1610 |
|
|
<default>1</default> |
| 1611 |
|
|
<comment><![CDATA[S4 enable/disable /RO]]></comment> |
| 1612 |
|
|
</var> |
| 1613 |
|
|
|
| 1614 |
|
|
<var> |
| 1615 |
|
|
<name>S4_TRH</name> |
| 1616 |
|
|
<idx>121</idx> |
| 1617 |
|
|
<location>3</location> |
| 1618 |
|
|
<default>16384</default> |
| 1619 |
|
|
<comment><![CDATA[S4 command /RO]]></comment> |
| 1620 |
|
|
</var> |
| 1621 |
|
|
|
| 1622 |
|
|
<var> |
| 1623 |
|
|
<name>S4_ATTEMPT</name> |
| 1624 |
|
|
<idx>122</idx> |
| 1625 |
|
|
<location>3</location> |
| 1626 |
|
|
<default>0</default> |
| 1627 |
|
|
<comment><![CDATA[S4 force check /RO]]></comment> |
| 1628 |
|
|
</var> |
| 1629 |
|
|
|
| 1630 |
|
|
<var> |
| 1631 |
|
|
<name>S4_WORKING</name> |
| 1632 |
|
|
<idx>123</idx> |
| 1633 |
|
|
<location>2</location> |
| 1634 |
|
|
<default>1</default> |
| 1635 |
|
|
<comment><![CDATA[check if S4 is working or not /RO]]></comment> |
| 1636 |
|
|
</var> |
| 1637 |
|
|
|
| 1638 |
|
|
<var> |
| 1639 |
|
|
<name>CAL_UPLOAD_CAL_FE_MASK</name> |
| 1640 |
|
|
<idx>124</idx> |
| 1641 |
|
|
<location>3</location> |
| 1642 |
|
|
<default>15</default> |
| 1643 |
|
|
<comment><![CDATA[Defines the working read-out of calorimeter /RO]]></comment> |
| 1644 |
|
|
</var> |
| 1645 |
|
|
|
| 1646 |
|
|
<var> |
| 1647 |
|
|
<name>CAL_UPLOAD_CAL_DSP_MASK</name> |
| 1648 |
|
|
<idx>125</idx> |
| 1649 |
|
|
<location>3</location> |
| 1650 |
|
|
<default>15</default> |
| 1651 |
|
|
<comment><![CDATA[Defines the workings dsps of calorimeter /RO]]></comment> |
| 1652 |
|
|
</var> |
| 1653 |
|
|
|
| 1654 |
|
|
<var> |
| 1655 |
|
|
<name>CAL_VCAL</name> |
| 1656 |
|
|
<idx>126</idx> |
| 1657 |
|
|
<location>3</location> |
| 1658 |
|
|
<default>32773</default> |
| 1659 |
|
|
<comment><![CDATA[Variable modified by pulse calibration /RW]]></comment> |
| 1660 |
|
|
</var> |
| 1661 |
|
|
|
| 1662 |
|
|
<var> |
| 1663 |
|
|
<name>CAL_CH</name> |
| 1664 |
|
|
<idx>127</idx> |
| 1665 |
|
|
<location>3</location> |
| 1666 |
|
|
<default>1</default> |
| 1667 |
|
|
<comment><![CDATA[Variable modified by pulse calibration /RW]]></comment> |
| 1668 |
|
|
</var> |
| 1669 |
|
|
|
| 1670 |
|
|
<var> |
| 1671 |
|
|
<name>CAL_TEMP</name> |
| 1672 |
|
|
<idx>128</idx> |
| 1673 |
|
|
<location>3</location> |
| 1674 |
|
|
<default>5</default> |
| 1675 |
|
|
<comment><![CDATA[Maximum calorimeter temperature alarms /RO]]></comment> |
| 1676 |
|
|
</var> |
| 1677 |
|
|
|
| 1678 |
|
|
<arr> |
| 1679 |
|
|
<name>CAL_COUNT</name> |
| 1680 |
|
|
<n>4</n> |
| 1681 |
|
|
<idx>51</idx> |
| 1682 |
|
|
<location>3</location> |
| 1683 |
|
|
<default>{ |
| 1684 |
|
|
0x0003, |
| 1685 |
|
|
0x0003, |
| 1686 |
|
|
0x0003, |
| 1687 |
|
|
0x0003 |
| 1688 |
|
|
}</default> |
| 1689 |
|
|
<comment><![CDATA[defines the calorimeter read out repetitions /RO]]></comment> |
| 1690 |
|
|
</arr> |
| 1691 |
|
|
|
| 1692 |
|
|
<var> |
| 1693 |
|
|
<name>CAL_OK</name> |
| 1694 |
|
|
<idx>129</idx> |
| 1695 |
|
|
<location>3</location> |
| 1696 |
|
|
<default>1</default> |
| 1697 |
|
|
<comment><![CDATA[calo ON_OFF in ACQ /RW]]></comment> |
| 1698 |
|
|
</var> |
| 1699 |
|
|
|
| 1700 |
|
|
<var> |
| 1701 |
|
|
<name>CAL_CHECK_FE</name> |
| 1702 |
|
|
<idx>130</idx> |
| 1703 |
|
|
<location>3</location> |
| 1704 |
|
|
<default>0</default> |
| 1705 |
|
|
<comment><![CDATA[calo check FE /RO]]></comment> |
| 1706 |
|
|
</var> |
| 1707 |
|
|
|
| 1708 |
|
|
<var> |
| 1709 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I211</name> |
| 1710 |
|
|
<idx>131</idx> |
| 1711 |
|
|
<location>3</location> |
| 1712 |
|
|
<default>8</default> |
| 1713 |
|
|
<comment><![CDATA[write fpga /RO]]></comment> |
| 1714 |
|
|
</var> |
| 1715 |
|
|
|
| 1716 |
|
|
<arr> |
| 1717 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I211</name> |
| 1718 |
|
|
<n>2</n> |
| 1719 |
|
|
<idx>52</idx> |
| 1720 |
|
|
<location>3</location> |
| 1721 |
|
|
<default>{0x4D230000,0x0001D214}</default> |
| 1722 |
|
|
<comment><![CDATA[write fpga /RO]]></comment> |
| 1723 |
|
|
</arr> |
| 1724 |
|
|
|
| 1725 |
|
|
<var> |
| 1726 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I221</name> |
| 1727 |
|
|
<idx>132</idx> |
| 1728 |
|
|
<location>3</location> |
| 1729 |
|
|
<default>8</default> |
| 1730 |
|
|
<comment><![CDATA[write fpga /RO]]></comment> |
| 1731 |
|
|
</var> |
| 1732 |
|
|
|
| 1733 |
|
|
<arr> |
| 1734 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I221</name> |
| 1735 |
|
|
<n>2</n> |
| 1736 |
|
|
<idx>53</idx> |
| 1737 |
|
|
<location>3</location> |
| 1738 |
|
|
<default>{0x4D230001,0x0000F505}</default> |
| 1739 |
|
|
<comment><![CDATA[write fpga /RO]]></comment> |
| 1740 |
|
|
</arr> |
| 1741 |
|
|
|
| 1742 |
|
|
<var> |
| 1743 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I231</name> |
| 1744 |
|
|
<idx>133</idx> |
| 1745 |
|
|
<location>3</location> |
| 1746 |
|
|
<default>8</default> |
| 1747 |
|
|
<comment><![CDATA[write fpga /RO]]></comment> |
| 1748 |
|
|
</var> |
| 1749 |
|
|
|
| 1750 |
|
|
<arr> |
| 1751 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I231</name> |
| 1752 |
|
|
<n>2</n> |
| 1753 |
|
|
<idx>54</idx> |
| 1754 |
|
|
<location>3</location> |
| 1755 |
|
|
<default>{0x4D230003,0xFFFF866A}</default> |
| 1756 |
|
|
<comment><![CDATA[write fpga /RO]]></comment> |
| 1757 |
|
|
</arr> |
| 1758 |
|
|
|
| 1759 |
|
|
<var> |
| 1760 |
|
|
<name>BUF_LEN_CAL_WRITE_DSP_MEM_I41</name> |
| 1761 |
|
|
<idx>134</idx> |
| 1762 |
|
|
<location>1</location> |
| 1763 |
|
|
<default>4234</default> |
| 1764 |
|
|
<comment><![CDATA[dsp prog i41 /R0]]></comment> |
| 1765 |
|
|
</var> |
| 1766 |
|
|
|
| 1767 |
|
|
<arr> |
| 1768 |
|
|
<name>BUF_CAL_WRITE_DSP_MEM_I41</name> |
| 1769 |
|
|
<n>3176</n> |
| 1770 |
|
|
<idx>55</idx> |
| 1771 |
|
|
<location>1</location> |
| 1772 |
|
|
<default>{0x8E630000,0x14000840,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000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| 1773 |
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<comment><![CDATA[dsp prog i41 /R0]]></comment> |
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</arr> |
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| 1776 |
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<var> |
| 1777 |
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<name>BUF_LEN_CAL_WRITE_DSP_MEM_I42</name> |
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<idx>135</idx> |
| 1779 |
|
|
<location>1</location> |
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|
|
<default>3646</default> |
| 1781 |
|
|
<comment><![CDATA[dsp prog i42 /RO]]></comment> |
| 1782 |
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</var> |
| 1783 |
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| 1784 |
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<arr> |
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<name>BUF_CAL_WRITE_DSP_MEM_I42</name> |
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<n>2723</n> |
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<idx>56</idx> |
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<location>1</location> |
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<default>{0x8E638000,0x0001071A,0x0A00001F,0x0A00001F,0x0A00001F,0x1807008F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x180400EF,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x180B009F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x0A00001F,0x3C000074,0x3C290003,0x3C050001,0x40400070,0x93FF00F0,0x47FF00F0,0x93FF00E0,0x47B00000,0x93FE0060,0x04000060,0x180300CF,0x02800000,0x020000CF,0x0203000F,0x020C000F,0x3400000F,0x34000008,0x34000009,0x3400000A,0x3400000B,0x38000008,0x38000009,0x3800000A,0x3800000B,0x34000004,0x34000015,0x38000004,0x38000015,0x40000016,0x180300BF,0x0200008F,0x83FE005A,0x40000064,0x2B8200AA,0x18060010,0x35D00001,0x278200DF,0x18070040,0x2782009F,0x180500A0,0x44210000,0x180500DF,0x40000000,0x919F00A0,0x42100080,0x919F0090,0x40000000,0x919F0080,0x1807004F,0x383800B0,0x278200DF,0x500000A0,0x23180001,0x2262001F,0x580000A0,0x34000008,0x34000015,0x358C00B0,0x959F0040,0x47FF00FA,0x3C040025,0x140600EE,0x680000A1,0x41080040,0x919F0090,0x2098000F,0x340000B1,0x354A00B3,0x40000000,0x919F0030,0x39400000,0x0A00001F,0x83FE005A,0x40000064,0x2B8200AA,0x180700E0,0x1C0A009F,0x180700FF,0x1C08001F,0x0202000F,0x0A00001F,0x34060006,0x37BE0017,0x38060006,0x3BBE0017,0x34000000,0x859F0042,0x4FFF00C9,0x3C0000B5,0x140900BE,0xC0000001,0x0D030057,0x6800000E,0x2AE00085,0x10100024,0x678E0048,0x18090040,0x3C0F00F7,0x680000A6,0x1809007F,0x3C000007,0x6EE200A6,0x18090094,0x09000009,0x180900BF,0x680000A9,0x00000000,0x59000022,0x09000007,0x0900000F,0x09000013,0x819F003A,0x2262001F,0x26EA001F,0x180A0050,0x00000000,0x180A007F,0x959F0042,0x4000000A,0x919F003A,0x0A00000F,0x34060006,0x37BE0017,0x38060006,0x3BBE0017,0x83FE0050,0x34000000,0x3C0000B5,0x140B005E,0x600000A1,0x50000042,0x2780009F,0x22E20001,0x680000A6,0x09000007,0x09000013,0x0A00000F,0x819F0090,0x1C3700AF,0x919F009E,0x41080044,0x2AE600AA,0x180C0011,0x1C0E009F,0x180E007F,0x42100084,0x2AE600AA,0x180C0061,0x1C1700AF,0x180E007F,0x44210004,0x2AE600AA,0x180C00B1,0x1C3000BF,0x180E007F,0x42520094,0x2AE600AA,0x180D0001,0x1C20003F,0x180E007F,0x429400A4,0x2AE600AA,0x180D0051,0x1C27008F,0x180E007F,0x431800C4,0x2AE600AA,0x180D00A1,0x1C2B00CF,0x180E007F,0x42D600B4,0x2AE600AA,0x180D00F1,0x1C2500AF,0x180E007F,0x44630014,0x2AE600AA,0x180E0041,0x1C32008F,0x180E007F,0x35D00000,0xA0000011,0x680000E1,0x0208000F,0x0A00001F,0x39D00032,0x4CA5000A,0x780000A9,0x780000A9,0x4000000A,0x83FE0050,0x2780001F,0x237A0001,0x780000A9,0x39820000,0x40000001,0x50000041,0x52E30041,0x180F0091,0x22C4000F,0x180F00B0,0x400F00F1,0x04000040,0x2098000F,0x40000016,0x39820020,0x3C040025,0x1410001E,0x50000021,0x2160000F,0x39860040,0x40000005,0x50000041,0x52E30041,0x18100091,0x22C4000F,0x181000B0,0x4FF00005,0x04000040,0x23A9000F,0x780000A9,0x383800B0,0x500000A0,0x780000A9,0x83FE0050,0x2380001F,0x18110081,0x354A00B0,0x3C420005,0x1411007E,0x60000001,0x78000009,0x340000B0,0x354A00B1,0x398C00B0,0x39820021,0x37FF00F6,0x37FF0007,0x380000B6,0x3BFB00F7,0x40000016,0x40000000,0x919F0070,0x3C0000B5,0x1416008E,0x3C000065,0x1416007E,0x399D0033,0x40000004,0x2098000F,0x40000005,0x400000B4,0x56000005,0x70000042,0x2A600004,0x0D00001A,0x3C010005,0x1414002E,0x60000041,0x2AE00024,0x18140022,0x22E1000F,0x181300B4,0x2160000F,0x2228000F,0x0D00005A,0x1814002F,0x0D0100A0,0x22F2000F,0x22E2001F,0x400000F4,0x63820044,0x780000AD,0x7800004D,0x09000005,0x0D010000,0x22F0000F,0x0F1200FC,0x22E6001F,0x0D00001A,0x0D000005,0x266000FF,0x181500D4,0x23B100DF,0x780000A9,0x1C33007F,0x780000A9,0x419D0034,0x0D020003,0x22E0000F,0x18160070,0x399D0033,0x0D0C005A,0x1415007E,0x7000000D,0x78000009,0x0F1200FF,0x819F0075,0x226E000F,0x919F007A,0x1816007F,0x819F007A,0x226A001F,0x919F007A,0x09000007,0x23B9001F,0x780000A9,0x3C010005,0x1416006E,0x60000005,0x78000009,0x00000000,0x09000013,0x819F0070,0x383800D0,0x50000040,0x4000000A,0x2AE000AA,0x237A0005,0x35D00010,0x680000A1,0x68000001,0x0D020002,0x41D00004,0x22E0000F,0x22E2001F,0x91D0000A,0x41080040,0x919F0090,0x0A00000F,0x819F00A0,0x1C3700AF,0x919F00AE,0x819F0081,0x40000004,0x2EE6005E,0x181B0050,0x35D00000,0x358C00B1,0x359000D2,0x0D050032,0x39400000,0x39C80061,0x0D0A0021,0x4FFF00C9,0x40000016,0x3C040025,0x141B003E,0x2098000F,0x4000000A,0x3C010005,0x141900AE,0xF8000001,0x0D030087,0x10100048,0x2B8600AA,0x18190091,0x2262001F,0x3C000007,0x2160000F,0x181900AF,0x3C0F00F7,0x58000071,0x0D00000A,0x1C33007F,0x47FF00F0,0x2AE800AA,0x181B0031,0x600000B9,0x600000C9,0x667A00A9,0x2A7900AA,0x181A0081,0x4000000A,0x509800E5,0x181A009F,0x52F200E5,0x53FA00F5,0x2162000F,0x680000BD,0x6A1000CD,0x0D0000BE,0x2E7900CF,0x20980000,0x696200AD,0x580000B9,0x580000C9,0x680000A5,0x181B00AF,0x358C00B1,0x4000000A,0x3C040025,0x141B009E,0x680000A5,0x35D00000,0x340000B1,0x0D050021,0x358C00B3,0x39400000,0x39860061,0x40000016,0x3C040025,0x141E004E,0x600000ED,0x3C010005,0x141E003E,0x600000A5,0x667A0041,0x627900B5,0x26180000,0x627900C5,0x20980000,0x2326000F,0x47FF00F0,0x2AE800FA,0x181D0081,0x50000041,0x52E70045,0x181D0045,0x181D006F,0x22E7000F,0x181D0083,0x4000000F,0x2710000F,0x2230000F,0x690700A9,0x680000B9,0x680000C9,0x600000B5,0x600000C5,0x627900D5,0x20980000,0x2107001F,0x680000B9,0x680000C9,0x680000D9,0x00000000,0x819F00A0,0x1C3700AF,0x919F00AE,0x819F0084,0x2220000F,0x919F008A,0x35D00000,0xA0000031,0x680000A1,0x42100080,0x68000001,0x680000E1,0x47FF00F4,0x26E6000F,0x181F0060,0x40100005,0x181F007F,0x40400005,0x22EA000F,0x18200011,0x919F008A,0x42520090,0x400000B1,0x919F0041,0x41400001,0x919F0051,0x41860061,0x919F0061,0x919F0090,0x0A00000F,0x859F0040,0x899F0050,0x899F0061,0x3C060005,0x1423009E,0x60000001,0x600000B1,0x600000C1,0x267C000F,0x18210005,0x233B000F,0x2B5C00BA,0x0D0000CA,0x2A100060,0x1C33007F,0x2E7E0046,0x233A0004,0x500000E0,0x580000A1,0x2B0000EB,0x28E200FC,0x0D00005C,0x60000021,0x60000031,0x28E0004B,0x21E6001F,0x60000021,0x2A7D008B,0x23C2001C,0x0D0000BC,0x0D0000CA,0x2961007F,0x21EE000F,0x29EE00E8,0x2A7D008B,0x23C2001C,0x0D0000BC,0x0D0000CA,0x2160000F,0x21E7001F,0x0D0000FC,0x0D0000C8,0x2A7E00EB,0x0D0000BA,0x1C35001F,0x400F00F4,0x2B8400AA,0x18230071,0x1C3600DF,0x2262001F,0x0F1200FF,0x1823008F,0x4080000E,0x3C000007,0x580000E5,0x959F0040,0x999F0050,0x999F0061,0x819F00A0,0x1C3700AF,0x919F00AE,0x819F0084,0x2220000F,0x919F008A,0x35D00000,0xA0000031,0x680000A1,0x42520090,0x68000001,0x680000E1,0x400000B5,0x22EA000F,0x18250081,0x919F008A,0x46310084,0x2AE600AA,0x18250021,0x42D600B0,0x1825008F,0x47FF00F4,0x2AE600AA,0x18250071,0x431800C0,0x1825008F,0x429400A0,0x919F0090,0x0A00000F,0x40000066,0x48000000,0x47FF00F1,0x39400000,0x39860061,0x3C420005,0x142600AE,0x50980024,0x4000002B,0x51600040,0x0F1300FE,0x2326000F,0x22780006,0x5A6600A1,0x22790006,0x3C000007,0x580000A5,0x40000000,0x919F0080,0x819F00A0,0x1C3700AF,0x47FF00F0,0x919F00A0,0x42100080,0x919F0090,0x35D00000,0xA0000021,0xA2D600B1,0x680000E1,0x0A00000F,0x4FFF00C9,0x40000026,0x3C000025,0x142A002E,0x39860060,0x39400001,0x3C040025,0x142A001E,0x2098000F,0x4000000A,0x0D0A0020,0x0D0A0031,0x3C010005,0x142800CE,0x50000021,0x50000005,0x0D030087,0x10100048,0x2B8600AA,0x21600000,0x22620010,0x0D00000A,0x1C33007F,0x0D0000CA,0x0D0A0002,0x0D0A0013,0x3C010005,0x142A000E,0x50000041,0x56E400B4,0x18290095,0x3C0F00F7,0x182A000F,0x0D0300A7,0x1012004A,0x2B8600AA,0x182900F0,0x3C0F00F7,0x182A000F,0x3C000007,0x580000B5,0x00000000,0x00000000,0x819F00A0,0x1C3700AF,0x819F0084,0x2220000F,0x919F008A,0x35D00000,0xA0000031,0x680000A1,0x429400A0,0x68000001,0x680000E1,0x40000025,0x22EA000F,0x182B0091,0x919F008A,0x42100080,0x40000004,0x2AE600AA,0x182B0081,0x40C6003E,0x182B009F,0x4631008E,0x919F00AE,0x919F0090,0x0A00000F,0x359000D0,0x39C80060,0x0D0A0010,0x3C040025,0x142C00DE,0x40400000,0x500000B1,0x500000C1,0x1C33007F,0x3C000007,0x580000A5,0x403F00F0,0x600000B1,0x600000C1,0x09000001,0x1C33007F,0x3C000007,0x580000A5,0x39860060,0x39400001,0x39820022,0x4FFF00C9,0x40000016,0x383800C3,0x5000007C,0x3C040025,0x142E00DE,0x2098000F,0x4000000A,0x3C010005,0x142E006E,0x50000021,0x50000054,0x0D030087,0x10100048,0x2B8600AA,0x182E0051,0x2262001F,0x2160000F,0x3C000007,0x182E006F,0x3C0F00F7,0x58000055,0x0D00000A,0x1C33007F,0x20EA000F,0x226300DF,0x0F1200FC,0x3C000007,0x580000E9,0x2098000F,0x39400000,0x40000016,0x3C420005,0x142F004E,0x50000021,0x2100000F,0x39820000,0x580000B1,0x580000C1,0x2098000F,0x39820020,0x3C040025,0x142F00DE,0x50000021,0x2100000F,0x39860040,0x580000B1,0x580000C1,0x819F00A0,0x1C3700AF,0x919F00AE,0x35D00000,0xA0000021,0xA31800C1,0x680000E1,0x40000000,0x919F0090,0x0A00000F,0x35D00000,0x340000B1,0x0D050021,0x819F0084,0x40000016,0x3C420005,0x1431008E,0x600000A1,0x600000B5,0x660000C5,0x20980000,0x2162000F,0x680000B9,0x680000C9,0x819F0084,0x2220000F,0x919F008A,0x35D00000,0xA0000021,0x680000A1,0x819F0090,0x68000001,0x40080005,0x22EA000F,0x18320061,0x919F008A,0x44630010,0x919F0090,0x0A00000F,0x340000B0,0x0D050010,0x3C420005,0x1433000E,0x40080000,0x600000B1,0x600000C1,0x1C33007F,0x680000A5,0x35D00000,0xA0000011,0xA4630011,0x40000000,0x919F0090,0x0A00000F,0x0F130001,0x0F0C0001,0x2E7F004E,0x3C000000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x07100000,0x2A0000EA,0x07100000,0x0D000004,0x2780001F,0x22620012,0x0A00000F,0x40000079,0x48000000,0x2E7800AF,0x1004008E,0x101B000C,0x0D0000CF,0x100200BE,0x101800A0,0x0F1A00F7,0x40000019,0x3C020005,0x1436006E,0x2AE6000C,0x2ACF008A,0x18360015,0x2BB7008E,0x0E13000F,0x0F1A00F1,0x100C00BE,0x101000CF,0x100A0080,0x0F1800F1,0x2B7B0029,0x2B7C00BA,0x2AE600CA,0x22CF000F,0x21600015,0x0A00000F,0x4400000E,0x2A7E000B,0x0D00001C,0x4FFF00F9,0x3C0000F5,0x1437008E,0x21E2001F,0x0D00004E,0x101600B0,0x2E7C005E,0x23C20004,0x2BAA00C1,0x0A00000F,0x4FFF00B9,0x400100FA,0x2E7A0080,0x2390000F,0x1010000A,0x2396000F,0x1016004A,0x2B960014,0x2BA0005A,0x2BA8004A,0x2BA9005A,0x2382000F,0x238A000F,0x0D0000EA,0x0F1A0005,0x0F1A000A,0x0A00000F,0x00000000,0x00180000,0x00460000,0x87C90000}</default> |
| 1790 |
|
|
<comment><![CDATA[dsp prog i42 /RO]]></comment> |
| 1791 |
|
|
</arr> |
| 1792 |
|
|
|
| 1793 |
|
|
<var> |
| 1794 |
|
|
<name>BUF_LEN_CAL_WRITE_DSP_MEM_I43</name> |
| 1795 |
|
|
<idx>136</idx> |
| 1796 |
|
|
<location>3</location> |
| 1797 |
|
|
<default>14</default> |
| 1798 |
|
|
<comment><![CDATA[dsp prog i43 /RO]]></comment> |
| 1799 |
|
|
</var> |
| 1800 |
|
|
|
| 1801 |
|
|
<arr> |
| 1802 |
|
|
<name>BUF_CAL_WRITE_DSP_MEM_I43</name> |
| 1803 |
|
|
<n>11</n> |
| 1804 |
|
|
<idx>57</idx> |
| 1805 |
|
|
<location>3</location> |
| 1806 |
|
|
<default>{0x8E638000,0x00000002,0x1803000F,0xBA0E0000}</default> |
| 1807 |
|
|
<comment><![CDATA[dsp prog i43 /RO]]></comment> |
| 1808 |
|
|
</arr> |
| 1809 |
|
|
|
| 1810 |
|
|
<var> |
| 1811 |
|
|
<name>BUF_LEN_CAL_READ_DSP_MEM_C31</name> |
| 1812 |
|
|
<idx>137</idx> |
| 1813 |
|
|
<location>3</location> |
| 1814 |
|
|
<default>10</default> |
| 1815 |
|
|
<comment><![CDATA[dsp prog c31 /RO]]></comment> |
| 1816 |
|
|
</var> |
| 1817 |
|
|
|
| 1818 |
|
|
<arr> |
| 1819 |
|
|
<name>BUF_CAL_READ_DSP_MEM_C31</name> |
| 1820 |
|
|
<n>8</n> |
| 1821 |
|
|
<idx>58</idx> |
| 1822 |
|
|
<location>3</location> |
| 1823 |
|
|
<default>{0xA7C80000,0x14001214,0x42BB0000}</default> |
| 1824 |
|
|
<comment><![CDATA[dsp prog c31 /RO]]></comment> |
| 1825 |
|
|
</arr> |
| 1826 |
|
|
|
| 1827 |
|
|
<var> |
| 1828 |
|
|
<name>BUF_LEN_CAL_READ_DSP_MEM_C32</name> |
| 1829 |
|
|
<idx>138</idx> |
| 1830 |
|
|
<location>3</location> |
| 1831 |
|
|
<default>10</default> |
| 1832 |
|
|
<comment><![CDATA[dsp prog c32 /RO]]></comment> |
| 1833 |
|
|
</var> |
| 1834 |
|
|
|
| 1835 |
|
|
<arr> |
| 1836 |
|
|
<name>BUF_CAL_READ_DSP_MEM_C32</name> |
| 1837 |
|
|
<n>8</n> |
| 1838 |
|
|
<idx>59</idx> |
| 1839 |
|
|
<location>3</location> |
| 1840 |
|
|
<default>{0xA7C80000,0x400B0420,0xD2820000}</default> |
| 1841 |
|
|
<comment><![CDATA[dsp prog c32 /RO]]></comment> |
| 1842 |
|
|
</arr> |
| 1843 |
|
|
|
| 1844 |
|
|
<var> |
| 1845 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I241_1</name> |
| 1846 |
|
|
<idx>139</idx> |
| 1847 |
|
|
<location>3</location> |
| 1848 |
|
|
<default>8</default> |
| 1849 |
|
|
<comment><![CDATA[write fpga i241_1 /RO]]></comment> |
| 1850 |
|
|
</var> |
| 1851 |
|
|
|
| 1852 |
|
|
<arr> |
| 1853 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I241_1</name> |
| 1854 |
|
|
<n>2</n> |
| 1855 |
|
|
<idx>60</idx> |
| 1856 |
|
|
<location>3</location> |
| 1857 |
|
|
<default>{0x4D230004,0x0FFF103B}</default> |
| 1858 |
|
|
<comment><![CDATA[write fpga i241_1 /RO]]></comment> |
| 1859 |
|
|
</arr> |
| 1860 |
|
|
|
| 1861 |
|
|
<var> |
| 1862 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I241_2</name> |
| 1863 |
|
|
<idx>140</idx> |
| 1864 |
|
|
<location>3</location> |
| 1865 |
|
|
<default>8</default> |
| 1866 |
|
|
<comment><![CDATA[write fpga i241_2 /RO]]></comment> |
| 1867 |
|
|
</var> |
| 1868 |
|
|
|
| 1869 |
|
|
<arr> |
| 1870 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I241_2</name> |
| 1871 |
|
|
<n>2</n> |
| 1872 |
|
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<idx>61</idx> |
| 1873 |
|
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<location>3</location> |
| 1874 |
|
|
<default>{0x4D230004,0x0FFF103B}</default> |
| 1875 |
|
|
<comment><![CDATA[write fpga i241_2 /RO]]></comment> |
| 1876 |
|
|
</arr> |
| 1877 |
|
|
|
| 1878 |
|
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<var> |
| 1879 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I241_3</name> |
| 1880 |
|
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<idx>141</idx> |
| 1881 |
|
|
<location>3</location> |
| 1882 |
|
|
<default>8</default> |
| 1883 |
|
|
<comment><![CDATA[write fpga i241_3 /RO]]></comment> |
| 1884 |
|
|
</var> |
| 1885 |
|
|
|
| 1886 |
|
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<arr> |
| 1887 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I241_3</name> |
| 1888 |
|
|
<n>2</n> |
| 1889 |
|
|
<idx>62</idx> |
| 1890 |
|
|
<location>3</location> |
| 1891 |
|
|
<default>{0x4D230004,0x0FEE122B}</default> |
| 1892 |
|
|
<comment><![CDATA[write fpga i241_3 /RO]]></comment> |
| 1893 |
|
|
</arr> |
| 1894 |
|
|
|
| 1895 |
|
|
<var> |
| 1896 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I241_4</name> |
| 1897 |
|
|
<idx>142</idx> |
| 1898 |
|
|
<location>3</location> |
| 1899 |
|
|
<default>8</default> |
| 1900 |
|
|
<comment><![CDATA[write fpga i241_4 /RO]]></comment> |
| 1901 |
|
|
</var> |
| 1902 |
|
|
|
| 1903 |
|
|
<arr> |
| 1904 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I241_4</name> |
| 1905 |
|
|
<n>2</n> |
| 1906 |
|
|
<idx>63</idx> |
| 1907 |
|
|
<location>3</location> |
| 1908 |
|
|
<default>{0x4D230004,0x0BFFDCFF}</default> |
| 1909 |
|
|
<comment><![CDATA[write fpga i241_4 /RO]]></comment> |
| 1910 |
|
|
</arr> |
| 1911 |
|
|
|
| 1912 |
|
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<var> |
| 1913 |
|
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<name>BUF_LEN_CAL_WRITE_FPGA_REG_I251_1</name> |
| 1914 |
|
|
<idx>143</idx> |
| 1915 |
|
|
<location>3</location> |
| 1916 |
|
|
<default>8</default> |
| 1917 |
|
|
<comment><![CDATA[write fpga i251_1 /RO]]></comment> |
| 1918 |
|
|
</var> |
| 1919 |
|
|
|
| 1920 |
|
|
<arr> |
| 1921 |
|
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<name>BUF_CAL_WRITE_FPGA_REG_I251_1</name> |
| 1922 |
|
|
<n>2</n> |
| 1923 |
|
|
<idx>64</idx> |
| 1924 |
|
|
<location>3</location> |
| 1925 |
|
|
<default>{0x4D230005,0x007FA6BD}</default> |
| 1926 |
|
|
<comment><![CDATA[write fpga i251_1 /RO]]></comment> |
| 1927 |
|
|
</arr> |
| 1928 |
|
|
|
| 1929 |
|
|
<var> |
| 1930 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I251_2</name> |
| 1931 |
|
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<idx>144</idx> |
| 1932 |
|
|
<location>3</location> |
| 1933 |
|
|
<default>8</default> |
| 1934 |
|
|
<comment><![CDATA[write fpga i251_2 /RO]]></comment> |
| 1935 |
|
|
</var> |
| 1936 |
|
|
|
| 1937 |
|
|
<arr> |
| 1938 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I251_2</name> |
| 1939 |
|
|
<n>2</n> |
| 1940 |
|
|
<idx>65</idx> |
| 1941 |
|
|
<location>3</location> |
| 1942 |
|
|
<default>{0x4D230005,0x007FA6BD}</default> |
| 1943 |
|
|
<comment><![CDATA[write fpga i251_2 /RO]]></comment> |
| 1944 |
|
|
</arr> |
| 1945 |
|
|
|
| 1946 |
|
|
<var> |
| 1947 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I251_3</name> |
| 1948 |
|
|
<idx>145</idx> |
| 1949 |
|
|
<location>3</location> |
| 1950 |
|
|
<default>8</default> |
| 1951 |
|
|
<comment><![CDATA[write fpga i251_3 /RO]]></comment> |
| 1952 |
|
|
</var> |
| 1953 |
|
|
|
| 1954 |
|
|
<arr> |
| 1955 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I251_3</name> |
| 1956 |
|
|
<n>2</n> |
| 1957 |
|
|
<idx>66</idx> |
| 1958 |
|
|
<location>3</location> |
| 1959 |
|
|
<default>{0x4D230005,0x007FA6BD}</default> |
| 1960 |
|
|
<comment><![CDATA[write fpga i251_3 /RO]]></comment> |
| 1961 |
|
|
</arr> |
| 1962 |
|
|
|
| 1963 |
|
|
<var> |
| 1964 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I251_4</name> |
| 1965 |
|
|
<idx>146</idx> |
| 1966 |
|
|
<location>3</location> |
| 1967 |
|
|
<default>8</default> |
| 1968 |
|
|
<comment><![CDATA[write fpga i251_4 /RO]]></comment> |
| 1969 |
|
|
</var> |
| 1970 |
|
|
|
| 1971 |
|
|
<arr> |
| 1972 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I251_4</name> |
| 1973 |
|
|
<n>2</n> |
| 1974 |
|
|
<idx>67</idx> |
| 1975 |
|
|
<location>3</location> |
| 1976 |
|
|
<default>{0x4D230005,0x007FA6BD}</default> |
| 1977 |
|
|
<comment><![CDATA[write fpga i251_4 /RO]]></comment> |
| 1978 |
|
|
</arr> |
| 1979 |
|
|
|
| 1980 |
|
|
<var> |
| 1981 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I261_1</name> |
| 1982 |
|
|
<idx>147</idx> |
| 1983 |
|
|
<location>3</location> |
| 1984 |
|
|
<default>8</default> |
| 1985 |
|
|
<comment><![CDATA[write fpga i261_1 /RO]]></comment> |
| 1986 |
|
|
</var> |
| 1987 |
|
|
|
| 1988 |
|
|
<arr> |
| 1989 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I261_1</name> |
| 1990 |
|
|
<n>2</n> |
| 1991 |
|
|
<idx>68</idx> |
| 1992 |
|
|
<location>3</location> |
| 1993 |
|
|
<default>{0x4D230002,0x0D55D059}</default> |
| 1994 |
|
|
<comment><![CDATA[write fpga i261_1 /RO]]></comment> |
| 1995 |
|
|
</arr> |
| 1996 |
|
|
|
| 1997 |
|
|
<var> |
| 1998 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I261_2</name> |
| 1999 |
|
|
<idx>148</idx> |
| 2000 |
|
|
<location>3</location> |
| 2001 |
|
|
<default>8</default> |
| 2002 |
|
|
<comment><![CDATA[write fpga i261_2 /RO]]></comment> |
| 2003 |
|
|
</var> |
| 2004 |
|
|
|
| 2005 |
|
|
<arr> |
| 2006 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I261_2</name> |
| 2007 |
|
|
<n>2</n> |
| 2008 |
|
|
<idx>69</idx> |
| 2009 |
|
|
<location>3</location> |
| 2010 |
|
|
<default>{0x4D230002,0x0D55D059}</default> |
| 2011 |
|
|
<comment><![CDATA[write fpga i261_2 /RO]]></comment> |
| 2012 |
|
|
</arr> |
| 2013 |
|
|
|
| 2014 |
|
|
<var> |
| 2015 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I261_3</name> |
| 2016 |
|
|
<idx>149</idx> |
| 2017 |
|
|
<location>3</location> |
| 2018 |
|
|
<default>8</default> |
| 2019 |
|
|
<comment><![CDATA[write fpga i261_3 /RO]]></comment> |
| 2020 |
|
|
</var> |
| 2021 |
|
|
|
| 2022 |
|
|
<arr> |
| 2023 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I261_3</name> |
| 2024 |
|
|
<n>2</n> |
| 2025 |
|
|
<idx>70</idx> |
| 2026 |
|
|
<location>3</location> |
| 2027 |
|
|
<default>{0x4D230002,0x0D55D059}</default> |
| 2028 |
|
|
<comment><![CDATA[write fpga i261_3 /RO]]></comment> |
| 2029 |
|
|
</arr> |
| 2030 |
|
|
|
| 2031 |
|
|
<var> |
| 2032 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I261_4</name> |
| 2033 |
|
|
<idx>150</idx> |
| 2034 |
|
|
<location>3</location> |
| 2035 |
|
|
<default>8</default> |
| 2036 |
|
|
<comment><![CDATA[write fpga i261_4 /RO]]></comment> |
| 2037 |
|
|
</var> |
| 2038 |
|
|
|
| 2039 |
|
|
<arr> |
| 2040 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I261_4</name> |
| 2041 |
|
|
<n>2</n> |
| 2042 |
|
|
<idx>71</idx> |
| 2043 |
|
|
<location>3</location> |
| 2044 |
|
|
<default>{0x4D230002,0x0D55D059}</default> |
| 2045 |
|
|
<comment><![CDATA[write fpga i261_4 /RO]]></comment> |
| 2046 |
|
|
</arr> |
| 2047 |
|
|
|
| 2048 |
|
|
<var> |
| 2049 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I260_1</name> |
| 2050 |
|
|
<idx>151</idx> |
| 2051 |
|
|
<location>3</location> |
| 2052 |
|
|
<default>8</default> |
| 2053 |
|
|
<comment><![CDATA[write fpga i260_1 /RO]]></comment> |
| 2054 |
|
|
</var> |
| 2055 |
|
|
|
| 2056 |
|
|
<arr> |
| 2057 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I260_1</name> |
| 2058 |
|
|
<n>2</n> |
| 2059 |
|
|
<idx>72</idx> |
| 2060 |
|
|
<location>3</location> |
| 2061 |
|
|
<default>{0x4D230002,0x055559F0}</default> |
| 2062 |
|
|
<comment><![CDATA[write fpga i260_1 /RO]]></comment> |
| 2063 |
|
|
</arr> |
| 2064 |
|
|
|
| 2065 |
|
|
<var> |
| 2066 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I260_2</name> |
| 2067 |
|
|
<idx>152</idx> |
| 2068 |
|
|
<location>3</location> |
| 2069 |
|
|
<default>8</default> |
| 2070 |
|
|
<comment><![CDATA[write fpga i260_2 /RO]]></comment> |
| 2071 |
|
|
</var> |
| 2072 |
|
|
|
| 2073 |
|
|
<arr> |
| 2074 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I260_2</name> |
| 2075 |
|
|
<n>2</n> |
| 2076 |
|
|
<idx>73</idx> |
| 2077 |
|
|
<location>3</location> |
| 2078 |
|
|
<default>{0x4D230002,0x055559F0}</default> |
| 2079 |
|
|
<comment><![CDATA[write fpga i260_2 /RO]]></comment> |
| 2080 |
|
|
</arr> |
| 2081 |
|
|
|
| 2082 |
|
|
<var> |
| 2083 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I260_3</name> |
| 2084 |
|
|
<idx>153</idx> |
| 2085 |
|
|
<location>3</location> |
| 2086 |
|
|
<default>8</default> |
| 2087 |
|
|
<comment><![CDATA[write fpga i260_3 /RO]]></comment> |
| 2088 |
|
|
</var> |
| 2089 |
|
|
|
| 2090 |
|
|
<arr> |
| 2091 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I260_3</name> |
| 2092 |
|
|
<n>2</n> |
| 2093 |
|
|
<idx>74</idx> |
| 2094 |
|
|
<location>3</location> |
| 2095 |
|
|
<default>{0x4D230002,0x055559F0}</default> |
| 2096 |
|
|
<comment><![CDATA[write fpga i260_3 /RO]]></comment> |
| 2097 |
|
|
</arr> |
| 2098 |
|
|
|
| 2099 |
|
|
<var> |
| 2100 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I260_4</name> |
| 2101 |
|
|
<idx>154</idx> |
| 2102 |
|
|
<location>3</location> |
| 2103 |
|
|
<default>8</default> |
| 2104 |
|
|
<comment><![CDATA[write fpga i260_4 /RO]]></comment> |
| 2105 |
|
|
</var> |
| 2106 |
|
|
|
| 2107 |
|
|
<arr> |
| 2108 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I260_4</name> |
| 2109 |
|
|
<n>2</n> |
| 2110 |
|
|
<idx>75</idx> |
| 2111 |
|
|
<location>3</location> |
| 2112 |
|
|
<default>{0x4D230002,0x055559F0}</default> |
| 2113 |
|
|
<comment><![CDATA[write fpga i260_4 /RO]]></comment> |
| 2114 |
|
|
</arr> |
| 2115 |
|
|
|
| 2116 |
|
|
<var> |
| 2117 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I311_1</name> |
| 2118 |
|
|
<idx>155</idx> |
| 2119 |
|
|
<location>3</location> |
| 2120 |
|
|
<default>8</default> |
| 2121 |
|
|
<comment><![CDATA[write fpga i311_1 /RO]]></comment> |
| 2122 |
|
|
</var> |
| 2123 |
|
|
|
| 2124 |
|
|
<arr> |
| 2125 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I311_1</name> |
| 2126 |
|
|
<n>2</n> |
| 2127 |
|
|
<idx>76</idx> |
| 2128 |
|
|
<location>3</location> |
| 2129 |
|
|
<default>{0x4D230002,0x0FFFA29B}</default> |
| 2130 |
|
|
<comment><![CDATA[write fpga i311_1 /RO]]></comment> |
| 2131 |
|
|
</arr> |
| 2132 |
|
|
|
| 2133 |
|
|
<var> |
| 2134 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I311_2</name> |
| 2135 |
|
|
<idx>156</idx> |
| 2136 |
|
|
<location>3</location> |
| 2137 |
|
|
<default>8</default> |
| 2138 |
|
|
<comment><![CDATA[write fpga i311_2 /RO]]></comment> |
| 2139 |
|
|
</var> |
| 2140 |
|
|
|
| 2141 |
|
|
<arr> |
| 2142 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I311_2</name> |
| 2143 |
|
|
<n>2</n> |
| 2144 |
|
|
<idx>77</idx> |
| 2145 |
|
|
<location>3</location> |
| 2146 |
|
|
<default>{0x4D230002,0x0FFFA29B}</default> |
| 2147 |
|
|
<comment><![CDATA[write fpga i311_2 /RO]]></comment> |
| 2148 |
|
|
</arr> |
| 2149 |
|
|
|
| 2150 |
|
|
<var> |
| 2151 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I311_3</name> |
| 2152 |
|
|
<idx>157</idx> |
| 2153 |
|
|
<location>3</location> |
| 2154 |
|
|
<default>8</default> |
| 2155 |
|
|
<comment><![CDATA[write fpga i311_3 /RO]]></comment> |
| 2156 |
|
|
</var> |
| 2157 |
|
|
|
| 2158 |
|
|
<arr> |
| 2159 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I311_3</name> |
| 2160 |
|
|
<n>2</n> |
| 2161 |
|
|
<idx>78</idx> |
| 2162 |
|
|
<location>3</location> |
| 2163 |
|
|
<default>{0x4D230002,0x0FFFA29B}</default> |
| 2164 |
|
|
<comment><![CDATA[write fpga i311_3 /RO]]></comment> |
| 2165 |
|
|
</arr> |
| 2166 |
|
|
|
| 2167 |
|
|
<var> |
| 2168 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I311_4</name> |
| 2169 |
|
|
<idx>158</idx> |
| 2170 |
|
|
<location>3</location> |
| 2171 |
|
|
<default>8</default> |
| 2172 |
|
|
<comment><![CDATA[write fpga i311_4 /RO]]></comment> |
| 2173 |
|
|
</var> |
| 2174 |
|
|
|
| 2175 |
|
|
<arr> |
| 2176 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I311_4</name> |
| 2177 |
|
|
<n>2</n> |
| 2178 |
|
|
<idx>79</idx> |
| 2179 |
|
|
<location>3</location> |
| 2180 |
|
|
<default>{0x4D230002,0x0FFFA29B}</default> |
| 2181 |
|
|
<comment><![CDATA[write fpga i311_4 /RO]]></comment> |
| 2182 |
|
|
</arr> |
| 2183 |
|
|
|
| 2184 |
|
|
<var> |
| 2185 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I310_1</name> |
| 2186 |
|
|
<idx>159</idx> |
| 2187 |
|
|
<location>3</location> |
| 2188 |
|
|
<default>8</default> |
| 2189 |
|
|
<comment><![CDATA[write fpga i310_1 /RO]]></comment> |
| 2190 |
|
|
</var> |
| 2191 |
|
|
|
| 2192 |
|
|
<arr> |
| 2193 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I310_1</name> |
| 2194 |
|
|
<n>2</n> |
| 2195 |
|
|
<idx>80</idx> |
| 2196 |
|
|
<location>3</location> |
| 2197 |
|
|
<default>{0x4D230002,0x07FF2B32}</default> |
| 2198 |
|
|
<comment><![CDATA[write fpga i310_1 /RO]]></comment> |
| 2199 |
|
|
</arr> |
| 2200 |
|
|
|
| 2201 |
|
|
<var> |
| 2202 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I310_2</name> |
| 2203 |
|
|
<idx>160</idx> |
| 2204 |
|
|
<location>3</location> |
| 2205 |
|
|
<default>8</default> |
| 2206 |
|
|
<comment><![CDATA[write fpga i310_2 /RO]]></comment> |
| 2207 |
|
|
</var> |
| 2208 |
|
|
|
| 2209 |
|
|
<arr> |
| 2210 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I310_2</name> |
| 2211 |
|
|
<n>2</n> |
| 2212 |
|
|
<idx>81</idx> |
| 2213 |
|
|
<location>3</location> |
| 2214 |
|
|
<default>{0x4D230002,0x07FF2B32}</default> |
| 2215 |
|
|
<comment><![CDATA[write fpga i310_2 /RO]]></comment> |
| 2216 |
|
|
</arr> |
| 2217 |
|
|
|
| 2218 |
|
|
<var> |
| 2219 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I310_3</name> |
| 2220 |
|
|
<idx>161</idx> |
| 2221 |
|
|
<location>3</location> |
| 2222 |
|
|
<default>8</default> |
| 2223 |
|
|
<comment><![CDATA[write fpga i310_3 /RO]]></comment> |
| 2224 |
|
|
</var> |
| 2225 |
|
|
|
| 2226 |
|
|
<arr> |
| 2227 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I310_3</name> |
| 2228 |
|
|
<n>2</n> |
| 2229 |
|
|
<idx>82</idx> |
| 2230 |
|
|
<location>3</location> |
| 2231 |
|
|
<default>{0x4D230002,0x07FF2B32}</default> |
| 2232 |
|
|
<comment><![CDATA[write fpga i310_3 /RO]]></comment> |
| 2233 |
|
|
</arr> |
| 2234 |
|
|
|
| 2235 |
|
|
<var> |
| 2236 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I310_4</name> |
| 2237 |
|
|
<idx>162</idx> |
| 2238 |
|
|
<location>3</location> |
| 2239 |
|
|
<default>8</default> |
| 2240 |
|
|
<comment><![CDATA[write fpga i310_4 /RO]]></comment> |
| 2241 |
|
|
</var> |
| 2242 |
|
|
|
| 2243 |
|
|
<arr> |
| 2244 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I310_4</name> |
| 2245 |
|
|
<n>2</n> |
| 2246 |
|
|
<idx>83</idx> |
| 2247 |
|
|
<location>3</location> |
| 2248 |
|
|
<default>{0x4D230002,0x07FF2B32}</default> |
| 2249 |
|
|
<comment><![CDATA[write fpga i310_4 /RO]]></comment> |
| 2250 |
|
|
</arr> |
| 2251 |
|
|
|
| 2252 |
|
|
<var> |
| 2253 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I321</name> |
| 2254 |
|
|
<idx>163</idx> |
| 2255 |
|
|
<location>3</location> |
| 2256 |
|
|
<default>8</default> |
| 2257 |
|
|
<comment><![CDATA[write fpga i321 /RO]]></comment> |
| 2258 |
|
|
</var> |
| 2259 |
|
|
|
| 2260 |
|
|
<arr> |
| 2261 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I321</name> |
| 2262 |
|
|
<n>2</n> |
| 2263 |
|
|
<idx>84</idx> |
| 2264 |
|
|
<location>3</location> |
| 2265 |
|
|
<default>{0x4D230000,0x8001C98C}</default> |
| 2266 |
|
|
<comment><![CDATA[write fpga i321 /RO]]></comment> |
| 2267 |
|
|
</arr> |
| 2268 |
|
|
|
| 2269 |
|
|
<var> |
| 2270 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I331_1</name> |
| 2271 |
|
|
<idx>164</idx> |
| 2272 |
|
|
<location>3</location> |
| 2273 |
|
|
<default>8</default> |
| 2274 |
|
|
<comment><![CDATA[write fpga i331_1 /RO]]></comment> |
| 2275 |
|
|
</var> |
| 2276 |
|
|
|
| 2277 |
|
|
<arr> |
| 2278 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I331_1</name> |
| 2279 |
|
|
<n>2</n> |
| 2280 |
|
|
<idx>85</idx> |
| 2281 |
|
|
<location>3</location> |
| 2282 |
|
|
<default>{0x4D230006,0x07FFF7F2}</default> |
| 2283 |
|
|
<comment><![CDATA[write fpga i331_1 /RO]]></comment> |
| 2284 |
|
|
</arr> |
| 2285 |
|
|
|
| 2286 |
|
|
<var> |
| 2287 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I331_2</name> |
| 2288 |
|
|
<idx>165</idx> |
| 2289 |
|
|
<location>3</location> |
| 2290 |
|
|
<default>8</default> |
| 2291 |
|
|
<comment><![CDATA[write fpga i331_2 /RO]]></comment> |
| 2292 |
|
|
</var> |
| 2293 |
|
|
|
| 2294 |
|
|
<arr> |
| 2295 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I331_2</name> |
| 2296 |
|
|
<n>2</n> |
| 2297 |
|
|
<idx>86</idx> |
| 2298 |
|
|
<location>3</location> |
| 2299 |
|
|
<default>{0x4D230006,0x07FFF7F2}</default> |
| 2300 |
|
|
<comment><![CDATA[write fpga i331_2 /RO]]></comment> |
| 2301 |
|
|
</arr> |
| 2302 |
|
|
|
| 2303 |
|
|
<var> |
| 2304 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I331_3</name> |
| 2305 |
|
|
<idx>166</idx> |
| 2306 |
|
|
<location>3</location> |
| 2307 |
|
|
<default>8</default> |
| 2308 |
|
|
<comment><![CDATA[write fpga i331_3 /RO]]></comment> |
| 2309 |
|
|
</var> |
| 2310 |
|
|
|
| 2311 |
|
|
<arr> |
| 2312 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I331_3</name> |
| 2313 |
|
|
<n>2</n> |
| 2314 |
|
|
<idx>87</idx> |
| 2315 |
|
|
<location>3</location> |
| 2316 |
|
|
<default>{0x4D230006,0x07FFF7F2}</default> |
| 2317 |
|
|
<comment><![CDATA[write fpga i331_3 /RO]]></comment> |
| 2318 |
|
|
</arr> |
| 2319 |
|
|
|
| 2320 |
|
|
<var> |
| 2321 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I331_4</name> |
| 2322 |
|
|
<idx>167</idx> |
| 2323 |
|
|
<location>3</location> |
| 2324 |
|
|
<default>8</default> |
| 2325 |
|
|
<comment><![CDATA[write fpga i331_4 /RO]]></comment> |
| 2326 |
|
|
</var> |
| 2327 |
|
|
|
| 2328 |
|
|
<arr> |
| 2329 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I331_4</name> |
| 2330 |
|
|
<n>2</n> |
| 2331 |
|
|
<idx>88</idx> |
| 2332 |
|
|
<location>3</location> |
| 2333 |
|
|
<default>{0x4D230006,0x07FFF7F2}</default> |
| 2334 |
|
|
<comment><![CDATA[write fpga i331_4 /RO]]></comment> |
| 2335 |
|
|
</arr> |
| 2336 |
|
|
|
| 2337 |
|
|
<var> |
| 2338 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_OFF</name> |
| 2339 |
|
|
<idx>168</idx> |
| 2340 |
|
|
<location>3</location> |
| 2341 |
|
|
<default>8</default> |
| 2342 |
|
|
<comment><![CDATA[write fpga reg off /RO]]></comment> |
| 2343 |
|
|
</var> |
| 2344 |
|
|
|
| 2345 |
|
|
<arr> |
| 2346 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_OFF</name> |
| 2347 |
|
|
<n>2</n> |
| 2348 |
|
|
<idx>89</idx> |
| 2349 |
|
|
<location>3</location> |
| 2350 |
|
|
<default>{0x4D230002,0x0000AC55}</default> |
| 2351 |
|
|
<comment><![CDATA[write fpga reg off /RO]]></comment> |
| 2352 |
|
|
</arr> |
| 2353 |
|
|
|
| 2354 |
|
|
<var> |
| 2355 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I341_1</name> |
| 2356 |
|
|
<idx>169</idx> |
| 2357 |
|
|
<location>3</location> |
| 2358 |
|
|
<default>8</default> |
| 2359 |
|
|
<comment><![CDATA[write fpga i341_1 /RO]]></comment> |
| 2360 |
|
|
</var> |
| 2361 |
|
|
|
| 2362 |
|
|
<arr> |
| 2363 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I341_1</name> |
| 2364 |
|
|
<n>2</n> |
| 2365 |
|
|
<idx>90</idx> |
| 2366 |
|
|
<location>3</location> |
| 2367 |
|
|
<default>{0x4D230004,0x0FFF103B}</default> |
| 2368 |
|
|
<comment><![CDATA[write fpga i341_1 /RO]]></comment> |
| 2369 |
|
|
</arr> |
| 2370 |
|
|
|
| 2371 |
|
|
<var> |
| 2372 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I341_2</name> |
| 2373 |
|
|
<idx>170</idx> |
| 2374 |
|
|
<location>3</location> |
| 2375 |
|
|
<default>8</default> |
| 2376 |
|
|
<comment><![CDATA[write fpga i341_2 /RO]]></comment> |
| 2377 |
|
|
</var> |
| 2378 |
|
|
|
| 2379 |
|
|
<arr> |
| 2380 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I341_2</name> |
| 2381 |
|
|
<n>2</n> |
| 2382 |
|
|
<idx>91</idx> |
| 2383 |
|
|
<location>3</location> |
| 2384 |
|
|
<default>{0x4D230004,0x0FFF103B}</default> |
| 2385 |
|
|
<comment><![CDATA[write fpga i341_2 /RO]]></comment> |
| 2386 |
|
|
</arr> |
| 2387 |
|
|
|
| 2388 |
|
|
<var> |
| 2389 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I341_3</name> |
| 2390 |
|
|
<idx>171</idx> |
| 2391 |
|
|
<location>3</location> |
| 2392 |
|
|
<default>8</default> |
| 2393 |
|
|
<comment><![CDATA[write fpga i341_3 /RO]]></comment> |
| 2394 |
|
|
</var> |
| 2395 |
|
|
|
| 2396 |
|
|
<arr> |
| 2397 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I341_3</name> |
| 2398 |
|
|
<n>2</n> |
| 2399 |
|
|
<idx>92</idx> |
| 2400 |
|
|
<location>3</location> |
| 2401 |
|
|
<default>{0x4D230004,0x0FEE122B}</default> |
| 2402 |
|
|
<comment><![CDATA[write fpga i341_3 /RO]]></comment> |
| 2403 |
|
|
</arr> |
| 2404 |
|
|
|
| 2405 |
|
|
<var> |
| 2406 |
|
|
<name>BUF_LEN_CAL_WRITE_FPGA_REG_I341_4</name> |
| 2407 |
|
|
<idx>172</idx> |
| 2408 |
|
|
<location>3</location> |
| 2409 |
|
|
<default>8</default> |
| 2410 |
|
|
<comment><![CDATA[write fpga i341_4 /RO]]></comment> |
| 2411 |
|
|
</var> |
| 2412 |
|
|
|
| 2413 |
|
|
<arr> |
| 2414 |
|
|
<name>BUF_CAL_WRITE_FPGA_REG_I341_4</name> |
| 2415 |
|
|
<n>2</n> |
| 2416 |
|
|
<idx>93</idx> |
| 2417 |
|
|
<location>3</location> |
| 2418 |
|
|
<default>{0x4D230004,0x0BFFDCFF}</default> |
| 2419 |
|
|
<comment><![CDATA[write fpga i341_4 /RO]]></comment> |
| 2420 |
|
|
</arr> |
| 2421 |
|
|
|
| 2422 |
|
|
<var> |
| 2423 |
|
|
<name>AC_1_OK</name> |
| 2424 |
|
|
<idx>173</idx> |
| 2425 |
|
|
<location>3</location> |
| 2426 |
|
|
<default>1</default> |
| 2427 |
|
|
<comment><![CDATA[AC ON_OFF in ACQ /RW]]></comment> |
| 2428 |
|
|
</var> |
| 2429 |
|
|
|
| 2430 |
|
|
<var> |
| 2431 |
|
|
<name>AC_2_OK</name> |
| 2432 |
|
|
<idx>174</idx> |
| 2433 |
|
|
<location>3</location> |
| 2434 |
|
|
<default>1</default> |
| 2435 |
|
|
<comment><![CDATA[AC ON_OFF in ACQ /RW]]></comment> |
| 2436 |
|
|
</var> |
| 2437 |
|
|
|
| 2438 |
|
|
<var> |
| 2439 |
|
|
<name>AC_1_CHECK</name> |
| 2440 |
|
|
<idx>175</idx> |
| 2441 |
|
|
<location>3</location> |
| 2442 |
|
|
<default>0</default> |
| 2443 |
|
|
<comment><![CDATA[AC check /RO]]></comment> |
| 2444 |
|
|
</var> |
| 2445 |
|
|
|
| 2446 |
|
|
<var> |
| 2447 |
|
|
<name>AC_2_CHECK</name> |
| 2448 |
|
|
<idx>176</idx> |
| 2449 |
|
|
<location>3</location> |
| 2450 |
|
|
<default>0</default> |
| 2451 |
|
|
<comment><![CDATA[AC check /RO]]></comment> |
| 2452 |
|
|
</var> |
| 2453 |
|
|
|
| 2454 |
|
|
<var> |
| 2455 |
|
|
<name>AC_LOOP</name> |
| 2456 |
|
|
<idx>177</idx> |
| 2457 |
|
|
<location>3</location> |
| 2458 |
|
|
<default>3</default> |
| 2459 |
|
|
<comment><![CDATA[AC max loop /RO]]></comment> |
| 2460 |
|
|
</var> |
| 2461 |
|
|
|
| 2462 |
|
|
<var> |
| 2463 |
|
|
<name>AC_LOOP2</name> |
| 2464 |
|
|
<idx>178</idx> |
| 2465 |
|
|
<location>3</location> |
| 2466 |
|
|
<default>3</default> |
| 2467 |
|
|
<comment><![CDATA[AC max loop 2 /RO]]></comment> |
| 2468 |
|
|
</var> |
| 2469 |
|
|
|
| 2470 |
|
|
<var> |
| 2471 |
|
|
<name>BUF_LEN_AC_1_SET_DAQ</name> |
| 2472 |
|
|
<idx>179</idx> |
| 2473 |
|
|
<location>3</location> |
| 2474 |
|
|
<default>132</default> |
| 2475 |
|
|
<comment><![CDATA[SET DAQ command /RO]]></comment> |
| 2476 |
|
|
</var> |
| 2477 |
|
|
|
| 2478 |
|
|
<arr> |
| 2479 |
|
|
<name>BUF_AC_1_SET_DAQ</name> |
| 2480 |
|
|
<n>35</n> |
| 2481 |
|
|
<idx>94</idx> |
| 2482 |
|
|
<location>3</location> |
| 2483 |
|
|
<default>{0x008A0000,0x000EFFFF,0xFFFF0001,0x0023FFFF,0xFFFF0002,0x0021FFFF,0xFFFF0003,0x0021FFFF,0xFFFF0004,0x0018FFFF,0xFFFF0005,0x002DFFFF,0xFFFF0006,0x0020FFFF,0xFFFF0007,0x0020FFFF,0xFFFF0008,0x0012FFFF,0xFFFF0009,0x0019FFFF,0xFFFF000A,0x001BFFFF,0xFFFF000B,0x001BFFFF,0xFFFF000C,0x0014FFFF,0xFFFF000D,0x0043FFFF,0xFFFF000E,0x0023FFFF,0xFFFF000F,0x0023FFFF,0xFFFF0D95}</default> |
| 2484 |
|
|
<comment><![CDATA[SET DAQ command /RO]]></comment> |
| 2485 |
|
|
</arr> |
| 2486 |
|
|
|
| 2487 |
|
|
<var> |
| 2488 |
|
|
<name>BUF_LEN_AC_2_SET_DAQ</name> |
| 2489 |
|
|
<idx>180</idx> |
| 2490 |
|
|
<location>3</location> |
| 2491 |
|
|
<default>132</default> |
| 2492 |
|
|
<comment><![CDATA[SET DAQ command /RO]]></comment> |
| 2493 |
|
|
</var> |
| 2494 |
|
|
|
| 2495 |
|
|
<arr> |
| 2496 |
|
|
<name>BUF_AC_2_SET_DAQ</name> |
| 2497 |
|
|
<n>35</n> |
| 2498 |
|
|
<idx>95</idx> |
| 2499 |
|
|
<location>3</location> |
| 2500 |
|
|
<default>{0x008A0000,0x0020FFFF,0xFFFF0001,0x001BFFFF,0xFFFF0002,0x003AFFFF,0xFFFF0003,0x003AFFFF,0xFFFF0004,0x0015FFFF,0xFFFF0005,0x001CFFFF,0xFFFF0006,0x0014FFFF,0xFFFF0007,0x0014FFFF,0xFFFF0008,0x001CFFFF,0xFFFF0009,0x0039FFFF,0xFFFF000A,0x0010FFFF,0xFFFF000B,0x0010FFFF,0xFFFF000C,0x0019FFFF,0xFFFF000D,0x0012FFFF,0xFFFF000E,0x001AFFFF,0xFFFF000F,0x001AFFFF,0xFFFFAE20}</default> |
| 2501 |
|
|
<comment><![CDATA[SET DAQ command /RO]]></comment> |
| 2502 |
|
|
</arr> |
| 2503 |
|
|
|
| 2504 |
|
|
<var> |
| 2505 |
|
|
<name>BUF_LEN_AC_SEND_DSP_PROG1</name> |
| 2506 |
|
|
<idx>181</idx> |
| 2507 |
|
|
<location>1</location> |
| 2508 |
|
|
<default>17034</default> |
| 2509 |
|
|
<comment><![CDATA[DSP Program 1 /RO]]></comment> |
| 2510 |
|
|
</var> |
| 2511 |
|
|
|
| 2512 |
|
|
<arr> |
| 2513 |
|
|
<name>BUF_AC_SEND_DSP_PROG1</name> |
| 2514 |
|
|
<n>5010</n> |
| 2515 |
|
|
<idx>96</idx> |
| 2516 |
|
|
<location>1</location> |
| 2517 |
|
|
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<comment><![CDATA[ /RO]]></comment> |
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<var> |
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<name>BUF_LEN_AC_2_SEND_DSP_PROG2</name> |
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<idx>183</idx> |
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<location>1</location> |
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<default>11156</default> |
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<comment><![CDATA[ /RO]]></comment> |
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</var> |
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| 2546 |
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<arr> |
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<name>BUF_AC_2_SEND_DSP_PROG2</name> |
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<n>3800</n> |
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<idx>98</idx> |
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<name>BUF_LEN_AC_2_WRITE_REG</name> |
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<default>{0x00890008,0xFFFF0040,0xACACFFFF,0x0041AC22,0xFFFF0044,0xFE00FFFF,0x00450000,0xFFFF0046,0xFFFFFFFF,0x00470040,0xFFFF0048,0xFFFFFFFF,0x0049FFFF,0x442B0000}</default> |
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| 2574 |
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<default>{0x00890008,0xFFFF0040,0xACACFFFF,0x0041AC11,0xFFFF0044,0xFE00FFFF,0x0045000F,0xFFFF0046,0xFFFFFFFF,0x00470040,0xFFFF0048,0xFFFFFFFF,0x0049FFFF,0x42D80000}</default> |
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<comment><![CDATA[ /RO]]></comment> |
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<name>BUF_LEN_TOF_WRITE_PMT_THR_1</name> |
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|
|
<comment><![CDATA[TOF set THR front end 1 /RO]]></comment> |
| 2612 |
|
|
</var> |
| 2613 |
|
|
|
| 2614 |
|
|
<arr> |
| 2615 |
|
|
<name>BUF_TOF_WRITE_PMT_THR_1</name> |
| 2616 |
|
|
<n>2</n> |
| 2617 |
|
|
<idx>102</idx> |
| 2618 |
|
|
<location>3</location> |
| 2619 |
|
|
<default>{0xB0C40A0A,0x0707FC00}</default> |
| 2620 |
|
|
<comment><![CDATA[TOF set THR front end 1 /RO]]></comment> |
| 2621 |
|
|
</arr> |
| 2622 |
|
|
|
| 2623 |
|
|
<var> |
| 2624 |
|
|
<name>BUF_LEN_TOF_WRITE_PMT_THR_2</name> |
| 2625 |
|
|
<idx>188</idx> |
| 2626 |
|
|
<location>3</location> |
| 2627 |
|
|
<default>7</default> |
| 2628 |
|
|
<comment><![CDATA[TOF set THR front end 2 /RO]]></comment> |
| 2629 |
|
|
</var> |
| 2630 |
|
|
|
| 2631 |
|
|
<arr> |
| 2632 |
|
|
<name>BUF_TOF_WRITE_PMT_THR_2</name> |
| 2633 |
|
|
<n>2</n> |
| 2634 |
|
|
<idx>103</idx> |
| 2635 |
|
|
<location>3</location> |
| 2636 |
|
|
<default>{0xB1C40707,0x0707BA00}</default> |
| 2637 |
|
|
<comment><![CDATA[TOF set THR front end 2 /RO]]></comment> |
| 2638 |
|
|
</arr> |
| 2639 |
|
|
|
| 2640 |
|
|
<var> |
| 2641 |
|
|
<name>BUF_LEN_TOF_WRITE_PMT_THR_3</name> |
| 2642 |
|
|
<idx>189</idx> |
| 2643 |
|
|
<location>3</location> |
| 2644 |
|
|
<default>7</default> |
| 2645 |
|
|
<comment><![CDATA[TOF set THR front end 3 /RO]]></comment> |
| 2646 |
|
|
</var> |
| 2647 |
|
|
|
| 2648 |
|
|
<arr> |
| 2649 |
|
|
<name>BUF_TOF_WRITE_PMT_THR_3</name> |
| 2650 |
|
|
<n>2</n> |
| 2651 |
|
|
<idx>104</idx> |
| 2652 |
|
|
<location>3</location> |
| 2653 |
|
|
<default>{0xB2C40707,0x0707C100}</default> |
| 2654 |
|
|
<comment><![CDATA[TOF set THR front end 3 /RO]]></comment> |
| 2655 |
|
|
</arr> |
| 2656 |
|
|
|
| 2657 |
|
|
<var> |
| 2658 |
|
|
<name>BUF_LEN_TOF_WRITE_PMT_THR_4</name> |
| 2659 |
|
|
<idx>190</idx> |
| 2660 |
|
|
<location>3</location> |
| 2661 |
|
|
<default>7</default> |
| 2662 |
|
|
<comment><![CDATA[TOF set THR front end 4 /RO]]></comment> |
| 2663 |
|
|
</var> |
| 2664 |
|
|
|
| 2665 |
|
|
<arr> |
| 2666 |
|
|
<name>BUF_TOF_WRITE_PMT_THR_4</name> |
| 2667 |
|
|
<n>2</n> |
| 2668 |
|
|
<idx>105</idx> |
| 2669 |
|
|
<location>3</location> |
| 2670 |
|
|
<default>{0xB3C40707,0x0707E800}</default> |
| 2671 |
|
|
<comment><![CDATA[TOF set THR front end 4 /RO]]></comment> |
| 2672 |
|
|
</arr> |
| 2673 |
|
|
|
| 2674 |
|
|
<var> |
| 2675 |
|
|
<name>BUF_LEN_TOF_WRITE_PMT_THR_5</name> |
| 2676 |
|
|
<idx>191</idx> |
| 2677 |
|
|
<location>3</location> |
| 2678 |
|
|
<default>7</default> |
| 2679 |
|
|
<comment><![CDATA[TOF set THR front end 5 /RO]]></comment> |
| 2680 |
|
|
</var> |
| 2681 |
|
|
|
| 2682 |
|
|
<arr> |
| 2683 |
|
|
<name>BUF_TOF_WRITE_PMT_THR_5</name> |
| 2684 |
|
|
<n>2</n> |
| 2685 |
|
|
<idx>106</idx> |
| 2686 |
|
|
<location>3</location> |
| 2687 |
|
|
<default>{0xB4C40707,0x07073700}</default> |
| 2688 |
|
|
<comment><![CDATA[TOF set THR front end 5 /RO]]></comment> |
| 2689 |
|
|
</arr> |
| 2690 |
|
|
|
| 2691 |
|
|
<var> |
| 2692 |
|
|
<name>BUF_LEN_TOF_WRITE_PMT_THR_6</name> |
| 2693 |
|
|
<idx>192</idx> |
| 2694 |
|
|
<location>3</location> |
| 2695 |
|
|
<default>7</default> |
| 2696 |
|
|
<comment><![CDATA[TOF set THR front end 5 /RO]]></comment> |
| 2697 |
|
|
</var> |
| 2698 |
|
|
|
| 2699 |
|
|
<arr> |
| 2700 |
|
|
<name>BUF_TOF_WRITE_PMT_THR_6</name> |
| 2701 |
|
|
<n>2</n> |
| 2702 |
|
|
<idx>107</idx> |
| 2703 |
|
|
<location>3</location> |
| 2704 |
|
|
<default>{0xB5C40707,0x07071E00}</default> |
| 2705 |
|
|
<comment><![CDATA[TOF set THR front end 5 /RO]]></comment> |
| 2706 |
|
|
</arr> |
| 2707 |
|
|
|
| 2708 |
|
|
<var> |
| 2709 |
|
|
<name>TOF_OK</name> |
| 2710 |
|
|
<idx>193</idx> |
| 2711 |
|
|
<location>3</location> |
| 2712 |
|
|
<default>1</default> |
| 2713 |
|
|
<comment><![CDATA[TOF ON_OFF in ACQ /RW]]></comment> |
| 2714 |
|
|
</var> |
| 2715 |
|
|
|
| 2716 |
|
|
<arr> |
| 2717 |
|
|
<name>TOF_PLAN</name> |
| 2718 |
|
|
<n>6</n> |
| 2719 |
|
|
<idx>108</idx> |
| 2720 |
|
|
<location>3</location> |
| 2721 |
|
|
<default>{1,1,1,1,1,1}</default> |
| 2722 |
|
|
<comment><![CDATA[TOF Plans selectors /RO]]></comment> |
| 2723 |
|
|
</arr> |
| 2724 |
|
|
|
| 2725 |
|
|
<var> |
| 2726 |
|
|
<name>ND_OK</name> |
| 2727 |
|
|
<idx>194</idx> |
| 2728 |
|
|
<location>3</location> |
| 2729 |
|
|
<default>1</default> |
| 2730 |
|
|
<comment><![CDATA[ND ON_OFF in ACQ /RW]]></comment> |
| 2731 |
|
|
</var> |
| 2732 |
|
|
|
| 2733 |
|
|
<var> |
| 2734 |
|
|
<name>ND_ATTEMPT</name> |
| 2735 |
|
|
<idx>195</idx> |
| 2736 |
|
|
<location>3</location> |
| 2737 |
|
|
<default>0</default> |
| 2738 |
|
|
<comment><![CDATA[Force ND in ACQ (1), unless ND_OK is FALSE /RO]]></comment> |
| 2739 |
|
|
</var> |
| 2740 |
|
|
|
| 2741 |
|
|
<var> |
| 2742 |
|
|
<name>ND_CMDS</name> |
| 2743 |
|
|
<idx>196</idx> |
| 2744 |
|
|
<location>3</location> |
| 2745 |
|
|
<default>3</default> |
| 2746 |
|
|
<comment><![CDATA[Force ND in ACQ, unless ND_OK is FALSE /RO]]></comment> |
| 2747 |
|
|
</var> |
| 2748 |
|
|
|
| 2749 |
|
|
<arr> |
| 2750 |
|
|
<name>PM_PERIODIC_DELAY</name> |
| 2751 |
|
|
<n>4</n> |
| 2752 |
|
|
<idx>109</idx> |
| 2753 |
|
|
<location>3</location> |
| 2754 |
|
|
<default> |
| 2755 |
|
|
{ |
| 2756 |
|
|
1000, |
| 2757 |
|
|
10000, |
| 2758 |
|
|
10000, |
| 2759 |
|
|
1000*24*60*60 |
| 2760 |
|
|
}</default> |
| 2761 |
|
|
<comment><![CDATA[Define frequency in milliseconds for periodic actions: PM_ACQUISITION,PM_CYCLIC_ACQUISITION,PM_SAVE_TMTC_VALUES,PM_TSB_T_CHECK,PM_TSB_B_CHECK. see PM_INFN_COMMAND enum declarations, /RO]]></comment> |
| 2762 |
|
|
</arr> |
| 2763 |
|
|
|
| 2764 |
|
|
<var> |
| 2765 |
|
|
<name>SCM_TM_DO_CHECK_VALUES_FREQ</name> |
| 2766 |
|
|
<idx>197</idx> |
| 2767 |
|
|
<location>3</location> |
| 2768 |
|
|
<default>1</default> |
| 2769 |
|
|
<comment><![CDATA[Do a Check on TM values every XXX Number of cyc acq done /RO]]></comment> |
| 2770 |
|
|
</var> |
| 2771 |
|
|
|
| 2772 |
|
|
<var> |
| 2773 |
|
|
<name>POWER_KHB</name> |
| 2774 |
|
|
<idx>198</idx> |
| 2775 |
|
|
<location>3</location> |
| 2776 |
|
|
<default>0</default> |
| 2777 |
|
|
<comment><![CDATA[Select KHB board 0==>HOT else COLD]]></comment> |
| 2778 |
|
|
</var> |
| 2779 |
|
|
|
| 2780 |
|
|
<var> |
| 2781 |
|
|
<name>PSB_TRB_S9004_ALL_ON_DELAY</name> |
| 2782 |
|
|
<idx>199</idx> |
| 2783 |
|
|
<location>3</location> |
| 2784 |
|
|
<default>1000</default> |
| 2785 |
|
|
<comment><![CDATA[milliseconds to wait after PSB_TRB_S9004_ALL_ON (board need to be switched on) /RO]]></comment> |
| 2786 |
|
|
</var> |
| 2787 |
|
|
|
| 2788 |
|
|
<var> |
| 2789 |
|
|
<name>PSB_TRB_BIAS_WAIT</name> |
| 2790 |
|
|
<idx>200</idx> |
| 2791 |
|
|
<location>3</location> |
| 2792 |
|
|
<default>3000</default> |
| 2793 |
|
|
<comment><![CDATA[wait between bias TRB switch on/off /RO]]></comment> |
| 2794 |
|
|
</var> |
| 2795 |
|
|
|
| 2796 |
|
|
<arr> |
| 2797 |
|
|
<name>PSB_COMMANDS</name> |
| 2798 |
|
|
<n>29</n> |
| 2799 |
|
|
<idx>110</idx> |
| 2800 |
|
|
<location>3</location> |
| 2801 |
|
|
<default>{ |
| 2802 |
|
|
0x00C5, |
| 2803 |
|
|
0x01B6, |
| 2804 |
|
|
0x02D0, |
| 2805 |
|
|
0x05C5, |
| 2806 |
|
|
0x05A5, |
| 2807 |
|
|
0x0500, |
| 2808 |
|
|
0x0500, |
| 2809 |
|
|
0x06C3, |
| 2810 |
|
|
0x07D0, |
| 2811 |
|
|
0x08EC, |
| 2812 |
|
|
0x09FF, |
| 2813 |
|
|
0x0AF9, |
| 2814 |
|
|
0x0B8A, |
| 2815 |
|
|
0x0C9F, |
| 2816 |
|
|
0x0E8A, |
| 2817 |
|
|
0x0F99, |
| 2818 |
|
|
0x10AE, |
| 2819 |
|
|
0x121E, |
| 2820 |
|
|
0x12DB, |
| 2821 |
|
|
0x121E, |
| 2822 |
|
|
0x14DD, |
| 2823 |
|
|
0x15CE, |
| 2824 |
|
|
0x17DB, |
| 2825 |
|
|
0x18E7, |
| 2826 |
|
|
0x19F4, |
| 2827 |
|
|
0x03c3, |
| 2828 |
|
|
0x04d6, |
| 2829 |
|
|
0x0dec, |
| 2830 |
|
|
0x0F3C |
| 2831 |
|
|
}</default> |
| 2832 |
|
|
<comment><![CDATA[Command for PSB /RO]]></comment> |
| 2833 |
|
|
</arr> |
| 2834 |
|
|
|
| 2835 |
|
|
<arr> |
| 2836 |
|
|
<name>PSB_CALO_FE_ON</name> |
| 2837 |
|
|
<n>4</n> |
| 2838 |
|
|
<idx>111</idx> |
| 2839 |
|
|
<location>3</location> |
| 2840 |
|
|
<default>{ |
| 2841 |
|
|
0x1AF2, |
| 2842 |
|
|
0x1BE1, |
| 2843 |
|
|
0x1CF4, |
| 2844 |
|
|
0x1DE7 |
| 2845 |
|
|
}</default> |
| 2846 |
|
|
<comment><![CDATA[Command for PSB /RO]]></comment> |
| 2847 |
|
|
</arr> |
| 2848 |
|
|
|
| 2849 |
|
|
<arr> |
| 2850 |
|
|
<name>PSB_CALO_FE_OFF</name> |
| 2851 |
|
|
<n>4</n> |
| 2852 |
|
|
<idx>112</idx> |
| 2853 |
|
|
<location>3</location> |
| 2854 |
|
|
<default>{ |
| 2855 |
|
|
0x1A37, |
| 2856 |
|
|
0x1B24, |
| 2857 |
|
|
0x1C31, |
| 2858 |
|
|
0x1D22 |
| 2859 |
|
|
}</default> |
| 2860 |
|
|
<comment><![CDATA[Command for PSB /RO]]></comment> |
| 2861 |
|
|
</arr> |
| 2862 |
|
|
|
| 2863 |
|
|
<arr> |
| 2864 |
|
|
<name>PSB_CALO_FE</name> |
| 2865 |
|
|
<n>4</n> |
| 2866 |
|
|
<idx>113</idx> |
| 2867 |
|
|
<location>3</location> |
| 2868 |
|
|
<default>{ |
| 2869 |
|
|
0x1AF2, |
| 2870 |
|
|
0x1BE1, |
| 2871 |
|
|
0x1CF4, |
| 2872 |
|
|
0x1DE7 |
| 2873 |
|
|
}</default> |
| 2874 |
|
|
<comment><![CDATA[Command for PSB /RO]]></comment> |
| 2875 |
|
|
</arr> |
| 2876 |
|
|
|
| 2877 |
|
|
<var> |
| 2878 |
|
|
<name>PSB_CALOFE_DELAY</name> |
| 2879 |
|
|
<idx>201</idx> |
| 2880 |
|
|
<location>3</location> |
| 2881 |
|
|
<default>1000</default> |
| 2882 |
|
|
<comment><![CDATA[Delay before power on CALO 5.7 /RO]]></comment> |
| 2883 |
|
|
</var> |
| 2884 |
|
|
|
| 2885 |
|
|
<var> |
| 2886 |
|
|
<name>HV_OK</name> |
| 2887 |
|
|
<idx>202</idx> |
| 2888 |
|
|
<location>3</location> |
| 2889 |
|
|
<default>1</default> |
| 2890 |
|
|
<comment><![CDATA[call HV settings after TRB setting at start-up /RO]]></comment> |
| 2891 |
|
|
</var> |
| 2892 |
|
|
|
| 2893 |
|
|
<arr> |
| 2894 |
|
|
<name>HVB_COMMANDS</name> |
| 2895 |
|
|
<n>12</n> |
| 2896 |
|
|
<idx>114</idx> |
| 2897 |
|
|
<location>3</location> |
| 2898 |
|
|
<default>{ |
| 2899 |
|
|
0xC387, |
| 2900 |
|
|
0xC78F, |
| 2901 |
|
|
0xCB16, |
| 2902 |
|
|
0xCF9F, |
| 2903 |
|
|
0xD2A5, |
| 2904 |
|
|
0xD7AF, |
| 2905 |
|
|
0xDBB7, |
| 2906 |
|
|
0xDFBF, |
| 2907 |
|
|
0xE3C7, |
| 2908 |
|
|
0xE6CD, |
| 2909 |
|
|
0xEBD7, |
| 2910 |
|
|
0xEEDD |
| 2911 |
|
|
}</default> |
| 2912 |
|
|
<comment><![CDATA[Command for HVB /RO]]></comment> |
| 2913 |
|
|
</arr> |
| 2914 |
|
|
|
| 2915 |
|
|
<arr> |
| 2916 |
|
|
<name>TSB_BOARD_OK</name> |
| 2917 |
|
|
<n>2</n> |
| 2918 |
|
|
<idx>115</idx> |
| 2919 |
|
|
<location>3</location> |
| 2920 |
|
|
<default>{1,0}</default> |
| 2921 |
|
|
<comment><![CDATA[User TSB Board no 0/1 flags /RO]]></comment> |
| 2922 |
|
|
</arr> |
| 2923 |
|
|
|
| 2924 |
|
|
<var> |
| 2925 |
|
|
<name>TSB_T_OK</name> |
| 2926 |
|
|
<idx>203</idx> |
| 2927 |
|
|
<location>3</location> |
| 2928 |
|
|
<default>1</default> |
| 2929 |
|
|
<comment><![CDATA[Do TSB Temperature check /RO]]></comment> |
| 2930 |
|
|
</var> |
| 2931 |
|
|
|
| 2932 |
|
|
<var> |
| 2933 |
|
|
<name>TSB_B_OK</name> |
| 2934 |
|
|
<idx>204</idx> |
| 2935 |
|
|
<location>3</location> |
| 2936 |
|
|
<default>1</default> |
| 2937 |
|
|
<comment><![CDATA[Do B-field TSB check /RO]]></comment> |
| 2938 |
|
|
</var> |
| 2939 |
|
|
|
| 2940 |
|
|
<var> |
| 2941 |
|
|
<name>ALLPAGEAVAIL_ATTEMPT</name> |
| 2942 |
|
|
<idx>205</idx> |
| 2943 |
|
|
<location>3</location> |
| 2944 |
|
|
<default>50</default> |
| 2945 |
|
|
<comment><![CDATA[ATTEMP TO ALLPAGE AVAILABLE]]></comment> |
| 2946 |
|
|
</var> |
Parent Directory
| 
Revision Log