/[PAMELA software]/quicklook/dataToXML/Data/compilationInfo/PRH_ParamHandler_INFN_auto.id
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Contents of /quicklook/dataToXML/Data/compilationInfo/PRH_ParamHandler_INFN_auto.id

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Revision 1.1.1.1 - (show annotations) (download) (vendor branch)
Tue Apr 25 09:00:20 2006 UTC (18 years, 7 months ago) by kusanagi
Branch: MAIN
CVS Tags: dataToXML1_02/01, dataToXML1_02/00, dataToXML1_03/00, dataToXML1_03/01, dataToXML1_00/00, firstRelease, dataToXML1_01/00, dataToXML1_03_02, HEAD
Changes since 1.1: +0 -0 lines
These program extract in an XML format the info contained into the ROOT files generated by YODA from the PAMELA data. To visualize the XML files in a more human readable format a collection of XSL files are given in the Data subfolder.

1 LOG_MASK 0
2 LU_WRITE_ON_UART 0
3 VERBOSE_DEBUG 1
4 DOWNLOAD_HEADER 2
5 KHB_ALARM_REG_LOW_LEVEL_MASK 3
6 KHB_STATUS_REG_LOW_LEVEL_MASK 4
7 PULSER_ACTION 5
8 N_BOOT 6
9 THERMISTORS_CHECK 7
10 THERM_MASK 8
11 THERM_LOW 1
12 THERM_HIGH 2
13 IPM_VOLTAGES_CHECK 9
14 KHB_IDAQ_CHECK 10
15 NTRIG 11
16 TRIG 12
17 CONF 0
18 CONF_SEL 13
19 CONFOK 14
20 OFF 15
21 NOFF 16
22 NRES 17
23 RES 18
24 WATCHDOG_RESET_DISABLE 19
25 NFAILED_POWER_ON 20
26 AUTO_RM_MODE 21
27 AUTO_SCM_MODE 22
28 MASK_ACQ_ALARM 23
29 GOM_DURING_ALARM 24
30 PM_FORCE_RUNNING_TIMEOUT 25
31 PAMELA_ON 26
32 N_CALIB 27
33 AC_1_ON 28
34 AC_2_ON 29
35 POWER_MODE 30
36 TRIG_II 31
37 BUF_LEN_TRIG_II_INIT 32
38 BUF_TRIG_II_INIT 3
39 BUF_LEN_TRIG_II_ACQ 33
40 BUF_TRIG_II_ACQ 4
41 EXP64_MODE 34
42 EXP64_MODE_DELAY 35
43 MH_END_OF_DOWNLOAD_TIMEOUT 36
44 PM_STOP_RUNMANAGER_TIMEOUT 37
45 PM_STOP_RUNMANAGER_TIMES_RETRY 38
46 PM_N_ORBIT_CALIB 39
47 WS_1_SETTING 5
48 WS_TIME_ORBIT 40
49 WS_FAVOURITE_WS 41
50 RM_N_TRIES_PREPARE_PAGE 42
51 RM_TRIES_PREPARE_PAGE_SLEEP 43
52 RM_WS3_TIMER_FIRE_AFTER 44
53 RM_RATE_METER_S1_TRH 6
54 RM_TIME_MAX_RUN 45
55 RM_TIME_SPECIAL_RUN 46
56 RM_ACQCHECK_PERIOD 47
57 RM_FLUSH_TIMEOUT 48
58 RM_NO_FLUSH_PARAM_DUMP 49
59 RM_DUMP_ALL_PARAMS 50
60 RM_NO_DUMMY_CMD_BEFORE_SPECIAL_TRK_ACQ 51
61 PWR_IPM_CONF 7
62 PWR_WAIT_BEFORE_SENDTC 52
63 PWR_CMD2PSB_DELAY 53
64 PWR_TRB_READ_ATTEMPTS 54
65 PWR_KHB_INITBOARD_TWICE_DELAY 55
66 PWR_IPM_WAIT_OK_N_ATTEMPT 56
67 PWR_IPM_WAIT_OK_DELAY_ATTEMPT 57
68 PWR_VOLTAGE_N_ATTEMPT 58
69 PWR_VOLTAGE_DELAY_ATTEMPT 59
70 PWR_VOLTAGE_IPM_RANGE_ON_MAX 8
71 PWR_VOLTAGE_IPM_RANGE_ON_MIN 9
72 PWR_VOLTAGE_IPM_RANGE_OFF_MAX 10
73 PWR_VOLTAGE_IPM_RANGE_OFF_MIN 11
74 PWR_TRB1_SET 60
75 PWR_TRB2_SET 61
76 PWR_TRB_SET_DELAY 62
77 PWR_TRB_READ_DELAY 63
78 PWR_IPM_ACTION 1
79 HB_N_ATTEMPT_WRITE2PIF 64
80 HB_WAIT_ON_FAILED_ATTEMPT_WRITE2PIF 65
81 HB_WRITE2PIF_TIMEOUT 66
82 HB_ALMOST_FULL 67
83 TM_FILTER_OPERATION 12
84 TM_FILTER_VALUE 13
85 TM_VRL_SUSPEND_HCL 68
86 TM_VRL_SUSPEND_BEFORE_START 69
87 DAQ_EVENT_RECEIVE_TIMEOUT 70
88 DAQ_WAITFREECMDIF_N 71
89 TRB_OK 72
90 TRIGGER_MODE_A 73
91 TRIGGER_MODE_B 74
92 TRIGGER_BUSY_CONTROL 75
93 TB_LINK 76
94 TB_LINK_CUSTOM 77
95 BUF_LEN_TB_SET_ALARM_MASK 78
96 BUF_TB_SET_ALARM_MASK 14
97 BUF_LEN_TB_SET_PMT_MASK 79
98 BUF_TB_SET_PMT_MASK 15
99 BUF_LEN_TB_SET_S4_CAL_MASK 80
100 BUF_TB_SET_S4_CAL_MASK 16
101 BUF_LEN_TB_SET_BUSY_MASK_IDAQ_HOT 81
102 BUF_TB_SET_BUSY_MASK_IDAQ_HOT 17
103 BUF_LEN_TB_SET_BUSY_MASK_IDAQ_COLD 82
104 BUF_TB_SET_BUSY_MASK_IDAQ_COLD 18
105 TRK_OK 83
106 TRK_DSP_OK 2
107 TRK_CALIB_MODE 84
108 TRK_TIME_SHORT 85
109 TRK_TIME_LONG 86
110 TRK_DSP_MASK 3
111 TRK_LOAD_PRG 19
112 TRK_CALIB_INIT 87
113 TRK_NLOOP 88
114 TRK_PED_MIN_0 4
115 TRK_PED_MIN_1 5
116 TRK_PED_MAX_0 6
117 TRK_PED_MAX_1 7
118 TRK_SIG_MIN_0 8
119 TRK_SIG_MIN_1 9
120 TRK_SIG_MAX_0 10
121 TRK_SIG_MAX_1 11
122 TRK_BAD_MAX_0 12
123 TRK_BAD_MAX_1 13
124 BUF_LEN_TRK_PROGRAM 89
125 BUF_TRK_PROGRAM 20
126 BUF_LEN_TRK_TRAILER_PRG_0 90
127 BUF_TRK_TRAILER_PRG_0 21
128 BUF_LEN_TRK_TRAILER_PRG_1 91
129 BUF_TRK_TRAILER_PRG_1 22
130 BUF_LEN_TRK_TRAILER_PRG_2 92
131 BUF_TRK_TRAILER_PRG_2 23
132 BUF_LEN_TRK_TRAILER_PRG_3 93
133 BUF_TRK_TRAILER_PRG_3 24
134 BUF_LEN_TRK_TRAILER_PRG_4 94
135 BUF_TRK_TRAILER_PRG_4 25
136 BUF_LEN_TRK_TRAILER_PRG_5 95
137 BUF_TRK_TRAILER_PRG_5 26
138 BUF_LEN_TRK_NUMBER_DSP_1_0 96
139 BUF_TRK_NUMBER_DSP_1_0 27
140 BUF_LEN_TRK_NUMBER_DSP_1_1 97
141 BUF_TRK_NUMBER_DSP_1_1 28
142 BUF_LEN_TRK_NUMBER_DSP_1_2 98
143 BUF_TRK_NUMBER_DSP_1_2 29
144 BUF_LEN_TRK_NUMBER_DSP_1_3 99
145 BUF_TRK_NUMBER_DSP_1_3 30
146 BUF_LEN_TRK_NUMBER_DSP_1_4 100
147 BUF_TRK_NUMBER_DSP_1_4 31
148 BUF_LEN_TRK_NUMBER_DSP_1_5 101
149 BUF_TRK_NUMBER_DSP_1_5 32
150 BUF_LEN_TRK_NUMBER_DSP_2_0 102
151 BUF_TRK_NUMBER_DSP_2_0 33
152 BUF_LEN_TRK_NUMBER_DSP_2_1 103
153 BUF_TRK_NUMBER_DSP_2_1 34
154 BUF_LEN_TRK_NUMBER_DSP_2_2 104
155 BUF_TRK_NUMBER_DSP_2_2 35
156 BUF_LEN_TRK_NUMBER_DSP_2_3 105
157 BUF_TRK_NUMBER_DSP_2_3 36
158 BUF_LEN_TRK_NUMBER_DSP_2_4 106
159 BUF_TRK_NUMBER_DSP_2_4 37
160 BUF_LEN_TRK_NUMBER_DSP_2_5 107
161 BUF_TRK_NUMBER_DSP_2_5 38
162 BUF_LEN_TRK_OPMODE_COMP_0 108
163 BUF_TRK_OPMODE_COMP_0 39
164 BUF_LEN_TRK_OPMODE_SPEC_0 109
165 BUF_TRK_OPMODE_SPEC_0 40
166 BUF_LEN_TRK_OPMODE_COMP_1 110
167 BUF_TRK_OPMODE_COMP_1 41
168 BUF_LEN_TRK_OPMODE_SPEC_1 111
169 BUF_TRK_OPMODE_SPEC_1 42
170 BUF_LEN_TRK_OPMODE_COMP_2 112
171 BUF_TRK_OPMODE_COMP_2 43
172 BUF_LEN_TRK_OPMODE_SPEC_2 113
173 BUF_TRK_OPMODE_SPEC_2 44
174 BUF_LEN_TRK_OPMODE_COMP_3 114
175 BUF_TRK_OPMODE_COMP_3 45
176 BUF_LEN_TRK_OPMODE_SPEC_3 115
177 BUF_TRK_OPMODE_SPEC_3 46
178 BUF_LEN_TRK_OPMODE_COMP_4 116
179 BUF_TRK_OPMODE_COMP_4 47
180 BUF_LEN_TRK_OPMODE_SPEC_4 117
181 BUF_TRK_OPMODE_SPEC_4 48
182 BUF_LEN_TRK_OPMODE_COMP_5 118
183 BUF_TRK_OPMODE_COMP_5 49
184 BUF_LEN_TRK_OPMODE_SPEC_5 119
185 BUF_TRK_OPMODE_SPEC_5 50
186 S4_OK 120
187 S4_TRH 121
188 S4_ATTEMPT 122
189 S4_WORKING 123
190 CAL_UPLOAD_CAL_FE_MASK 124
191 CAL_UPLOAD_CAL_DSP_MASK 125
192 CAL_VCAL 126
193 CAL_CH 127
194 CAL_TEMP 128
195 CAL_COUNT 51
196 CAL_OK 129
197 CAL_CHECK_FE 130
198 BUF_LEN_CAL_WRITE_FPGA_REG_I211 131
199 BUF_CAL_WRITE_FPGA_REG_I211 52
200 BUF_LEN_CAL_WRITE_FPGA_REG_I221 132
201 BUF_CAL_WRITE_FPGA_REG_I221 53
202 BUF_LEN_CAL_WRITE_FPGA_REG_I231 133
203 BUF_CAL_WRITE_FPGA_REG_I231 54
204 BUF_LEN_CAL_WRITE_DSP_MEM_I41 134
205 BUF_CAL_WRITE_DSP_MEM_I41 55
206 BUF_LEN_CAL_WRITE_DSP_MEM_I42 135
207 BUF_CAL_WRITE_DSP_MEM_I42 56
208 BUF_LEN_CAL_WRITE_DSP_MEM_I43 136
209 BUF_CAL_WRITE_DSP_MEM_I43 57
210 BUF_LEN_CAL_READ_DSP_MEM_C31 137
211 BUF_CAL_READ_DSP_MEM_C31 58
212 BUF_LEN_CAL_READ_DSP_MEM_C32 138
213 BUF_CAL_READ_DSP_MEM_C32 59
214 BUF_LEN_CAL_WRITE_FPGA_REG_I241_1 139
215 BUF_CAL_WRITE_FPGA_REG_I241_1 60
216 BUF_LEN_CAL_WRITE_FPGA_REG_I241_2 140
217 BUF_CAL_WRITE_FPGA_REG_I241_2 61
218 BUF_LEN_CAL_WRITE_FPGA_REG_I241_3 141
219 BUF_CAL_WRITE_FPGA_REG_I241_3 62
220 BUF_LEN_CAL_WRITE_FPGA_REG_I241_4 142
221 BUF_CAL_WRITE_FPGA_REG_I241_4 63
222 BUF_LEN_CAL_WRITE_FPGA_REG_I251_1 143
223 BUF_CAL_WRITE_FPGA_REG_I251_1 64
224 BUF_LEN_CAL_WRITE_FPGA_REG_I251_2 144
225 BUF_CAL_WRITE_FPGA_REG_I251_2 65
226 BUF_LEN_CAL_WRITE_FPGA_REG_I251_3 145
227 BUF_CAL_WRITE_FPGA_REG_I251_3 66
228 BUF_LEN_CAL_WRITE_FPGA_REG_I251_4 146
229 BUF_CAL_WRITE_FPGA_REG_I251_4 67
230 BUF_LEN_CAL_WRITE_FPGA_REG_I261_1 147
231 BUF_CAL_WRITE_FPGA_REG_I261_1 68
232 BUF_LEN_CAL_WRITE_FPGA_REG_I261_2 148
233 BUF_CAL_WRITE_FPGA_REG_I261_2 69
234 BUF_LEN_CAL_WRITE_FPGA_REG_I261_3 149
235 BUF_CAL_WRITE_FPGA_REG_I261_3 70
236 BUF_LEN_CAL_WRITE_FPGA_REG_I261_4 150
237 BUF_CAL_WRITE_FPGA_REG_I261_4 71
238 BUF_LEN_CAL_WRITE_FPGA_REG_I260_1 151
239 BUF_CAL_WRITE_FPGA_REG_I260_1 72
240 BUF_LEN_CAL_WRITE_FPGA_REG_I260_2 152
241 BUF_CAL_WRITE_FPGA_REG_I260_2 73
242 BUF_LEN_CAL_WRITE_FPGA_REG_I260_3 153
243 BUF_CAL_WRITE_FPGA_REG_I260_3 74
244 BUF_LEN_CAL_WRITE_FPGA_REG_I260_4 154
245 BUF_CAL_WRITE_FPGA_REG_I260_4 75
246 BUF_LEN_CAL_WRITE_FPGA_REG_I311_1 155
247 BUF_CAL_WRITE_FPGA_REG_I311_1 76
248 BUF_LEN_CAL_WRITE_FPGA_REG_I311_2 156
249 BUF_CAL_WRITE_FPGA_REG_I311_2 77
250 BUF_LEN_CAL_WRITE_FPGA_REG_I311_3 157
251 BUF_CAL_WRITE_FPGA_REG_I311_3 78
252 BUF_LEN_CAL_WRITE_FPGA_REG_I311_4 158
253 BUF_CAL_WRITE_FPGA_REG_I311_4 79
254 BUF_LEN_CAL_WRITE_FPGA_REG_I310_1 159
255 BUF_CAL_WRITE_FPGA_REG_I310_1 80
256 BUF_LEN_CAL_WRITE_FPGA_REG_I310_2 160
257 BUF_CAL_WRITE_FPGA_REG_I310_2 81
258 BUF_LEN_CAL_WRITE_FPGA_REG_I310_3 161
259 BUF_CAL_WRITE_FPGA_REG_I310_3 82
260 BUF_LEN_CAL_WRITE_FPGA_REG_I310_4 162
261 BUF_CAL_WRITE_FPGA_REG_I310_4 83
262 BUF_LEN_CAL_WRITE_FPGA_REG_I321 163
263 BUF_CAL_WRITE_FPGA_REG_I321 84
264 BUF_LEN_CAL_WRITE_FPGA_REG_I331_1 164
265 BUF_CAL_WRITE_FPGA_REG_I331_1 85
266 BUF_LEN_CAL_WRITE_FPGA_REG_I331_2 165
267 BUF_CAL_WRITE_FPGA_REG_I331_2 86
268 BUF_LEN_CAL_WRITE_FPGA_REG_I331_3 166
269 BUF_CAL_WRITE_FPGA_REG_I331_3 87
270 BUF_LEN_CAL_WRITE_FPGA_REG_I331_4 167
271 BUF_CAL_WRITE_FPGA_REG_I331_4 88
272 BUF_LEN_CAL_WRITE_FPGA_REG_OFF 168
273 BUF_CAL_WRITE_FPGA_REG_OFF 89
274 BUF_LEN_CAL_WRITE_FPGA_REG_I341_1 169
275 BUF_CAL_WRITE_FPGA_REG_I341_1 90
276 BUF_LEN_CAL_WRITE_FPGA_REG_I341_2 170
277 BUF_CAL_WRITE_FPGA_REG_I341_2 91
278 BUF_LEN_CAL_WRITE_FPGA_REG_I341_3 171
279 BUF_CAL_WRITE_FPGA_REG_I341_3 92
280 BUF_LEN_CAL_WRITE_FPGA_REG_I341_4 172
281 BUF_CAL_WRITE_FPGA_REG_I341_4 93
282 AC_1_OK 173
283 AC_2_OK 174
284 AC_1_CHECK 175
285 AC_2_CHECK 176
286 AC_LOOP 177
287 AC_LOOP2 178
288 BUF_LEN_AC_1_SET_DAQ 179
289 BUF_AC_1_SET_DAQ 94
290 BUF_LEN_AC_2_SET_DAQ 180
291 BUF_AC_2_SET_DAQ 95
292 BUF_LEN_AC_SEND_DSP_PROG1 181
293 BUF_AC_SEND_DSP_PROG1 96
294 BUF_LEN_AC_1_SEND_DSP_PROG2 182
295 BUF_AC_1_SEND_DSP_PROG2 97
296 BUF_LEN_AC_2_SEND_DSP_PROG2 183
297 BUF_AC_2_SEND_DSP_PROG2 98
298 BUF_LEN_AC_2_WRITE_REG 184
299 BUF_AC_2_WRITE_REG 99
300 BUF_LEN_AC_1_WRITE_REG 185
301 BUF_AC_1_WRITE_REG 100
302 BUF_LEN_AC_READ_DSP_MEM 186
303 BUF_AC_READ_DSP_MEM 101
304 BUF_LEN_TOF_WRITE_PMT_THR_1 187
305 BUF_TOF_WRITE_PMT_THR_1 102
306 BUF_LEN_TOF_WRITE_PMT_THR_2 188
307 BUF_TOF_WRITE_PMT_THR_2 103
308 BUF_LEN_TOF_WRITE_PMT_THR_3 189
309 BUF_TOF_WRITE_PMT_THR_3 104
310 BUF_LEN_TOF_WRITE_PMT_THR_4 190
311 BUF_TOF_WRITE_PMT_THR_4 105
312 BUF_LEN_TOF_WRITE_PMT_THR_5 191
313 BUF_TOF_WRITE_PMT_THR_5 106
314 BUF_LEN_TOF_WRITE_PMT_THR_6 192
315 BUF_TOF_WRITE_PMT_THR_6 107
316 TOF_OK 193
317 TOF_PLAN 108
318 ND_OK 194
319 ND_ATTEMPT 195
320 ND_CMDS 196
321 PM_PERIODIC_DELAY 109
322 SCM_TM_DO_CHECK_VALUES_FREQ 197
323 POWER_KHB 198
324 PSB_TRB_S9004_ALL_ON_DELAY 199
325 PSB_TRB_BIAS_WAIT 200
326 PSB_COMMANDS 110
327 PSB_CALO_FE_ON 111
328 PSB_CALO_FE_OFF 112
329 PSB_CALO_FE 113
330 PSB_CALOFE_DELAY 201
331 HV_OK 202
332 HVB_COMMANDS 114
333 TSB_BOARD_OK 115
334 TSB_T_OK 203
335 TSB_B_OK 204
336 ALLPAGEAVAIL_ATTEMPT 205

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