/[PAMELA software]/chewbacca/event/tmtc/TmtcRecord.h
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Contents of /chewbacca/event/tmtc/TmtcRecord.h

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Revision 1.1.1.1 - (show annotations) (download) (vendor branch)
Tue Sep 23 07:20:03 2008 UTC (16 years, 2 months ago) by mocchiut
Branch: v0r00, MAIN
CVS Tags: v1r02, v1r00, v1r01, start, v10RED, v9r00, v9r01, HEAD
Changes since 1.1: +0 -0 lines
File MIME type: text/plain
Imported sources, 23/09/2008

1 /** @file
2 * $Source: /repository/event/tmtc/TmtcRecord.h,v $
3 * $Id: TmtcRecord.h,v 1.1 2008-01-11 17:14:19 messineo Exp $
4 * $Author: messineo $
5 *
6 * 16 May 2005 - added 4 more TM_TH_ANA. Updated the ClassDef to 2
7 *
8 * Header file for the TmtcRecord class.
9 */
10 #ifndef TMTC_RECORD_H
11 #define TMTC_RECORD_H
12 #include "../SubPacket.h"
13 namespace pamela {
14 /**
15 * TmtcRecord data Wrapper
16 */
17 class TmtcRecord: public TObject {
18 private:
19
20 public:
21 /**
22 * The On-Board-Time of the Record.
23 */
24 UINT32 TM_RECORD_OBT;
25
26 /**
27 * Conctac closure and bi-livel single ended digital acquisitions data from the TMTC board.
28 *
29 * From MSB to LSB: (significant IDs is the last one) <br>
30 * TMTC_PACK_BIT(tm_val,TM_KRB_IPM1);<br>
31 * TMTC_PACK_BIT(tm_val,TM_KRB_IPM2);<br>
32 * TMTC_PACK_BIT(tm_val,TM_KRB_IPM3);<br>
33 * TMTC_PACK_BIT(tm_val,TM_KRB_IPM4);<br>
34 * TMTC_PACK_BIT(tm_val,TM_KRB_IPM5);<br>
35 * TMTC_PACK_BIT(tm_val,TM_KRB_IPM6);<br>
36 * <br>
37 * TMTC_PACK_BIT(tm_val,TM_KHB_HOT_LATCHUP);<br>
38 * TMTC_PACK_BIT(tm_val,TM_KHB_COLD_LATCHUP);<br>
39 * <br>
40 * TMTC_PACK_BIT(tm_val,TM_IDAQ_HOT_ALARM);<br>
41 * TMTC_PACK_BIT(tm_val,TM_IDAQ_COLD_ALARM);<br>
42 * <br>
43 * TMTC_PACK_BIT(tm_val,TM_VCB_STANDBY);<br>
44 * <br>
45 * TMTC_PACK_BIT(tm_val,TM_VRL_HOT);<br>
46 * TMTC_PACK_BIT(tm_val,TM_VRL_COLD);<br>
47 * <br>
48 * TMTC_PACK_BIT(tm_val,TM_PSB_ALARM);<br>
49 * <br>
50 * TMTC_PACK_BIT(tm_val,TM_TOFHV_HOT_ALARM);<br>
51 * TMTC_PACK_BIT(tm_val,TM_TOFHV_COLD_ALARM);<br>
52 */
53 UINT16 TM_DIAG_AND_BILEVEL_ACQ;
54
55 /**
56 * Thermistor analogue acquisition data from the TMTC board.
57 *
58 * The order from 0 to 11 is the following: (significant name are inside brackets)<br>
59 * <br>
60 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_IPM_TH]);<br>
61 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_S1_TH]);<br>
62 * <br>
63 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_S4_TH]);<br>
64 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_S4_ND_PLATE_TH]);<br>
65 * <br>
66 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_TRK_TH1]);<br>
67 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_TRK_TH2]);<br>
68 * <br>
69 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_FLUID_IN_TH]);<br>
70 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_FLUID_OUT_TH]);<br>
71 * <br>
72 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_VME_TH]);<br>
73 * <br>
74 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_DCDC_TH]);<br>
75 * <br>
76 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_CPU_TH1]);<br>
77 * HB_WRITE_UINT16(HB_TMTC,tmtc_tmp_array[TM_CPU_TH2]);<br>
78 * <br>
79 * HB_WRITE_UINT16(unknow 1);<br>
80 * HB_WRITE_UINT16(unknow 2);<br>
81 * HB_WRITE_UINT16(unknow 3);<br>
82 * HB_WRITE_UINT16(unknow 4);<br>
83 */
84 UINT16 TM_TH_ANA[16];
85
86
87 /**
88 * Digital data from the TMTC board.
89 *
90 * The order from 0 to 5 is the following: (significant name are inside brackets)<br>
91 * <br>
92 * HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM1]);<br>
93 * HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM2]);<br>
94 * HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM3]);<br>
95 * HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM4]);<br>
96 * HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM5]);<br>
97 * HB_WRITE_UINT8(HB_TMTC,tmtc_tmp_array[TM_IPM_MOV_IPM6]);<br>
98 */
99 UINT8 TM_DEA_ANA[6];
100
101 TmtcRecord(void);
102 ~TmtcRecord(void){};
103 ClassDef(TmtcRecord, 2)
104 };
105 }
106
107 #endif /* TMTC_RECORD_H */
108

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