/[PAMELA software]/DarthVader/TriggerLevel2/inc/TrigLevel2.h
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revision 1.8 by pam-de, Thu Mar 1 10:27:36 2007 UTC revision 1.9 by pam-de, Wed Apr 4 08:58:59 2007 UTC
# Line 30  class TrigLevel2 : public TObject { Line 30  class TrigLevel2 : public TObject {
30    UInt_t         pmtcount1[24]; ///<Rate counters of the first 24 pmt's (S111a,...,S118a,S111b,...,S118b etc. look at the QL sequence)    UInt_t         pmtcount1[24]; ///<Rate counters of the first 24 pmt's (S111a,...,S118a,S111b,...,S118b etc. look at the QL sequence)
31    UInt_t         pmtcount2[24]; ///<Rate counters of the last 24 pmt's    UInt_t         pmtcount2[24]; ///<Rate counters of the last 24 pmt's
32    UInt_t         patternbusy[3]; ///<Too complex to describe, basically there are 3 registers which store the status of the busy lines of all the detector in the 3 phases of acq. (after the trigger, when IDAQ set the busy and when iDAQ remove it)    UInt_t         patternbusy[3]; ///<Too complex to describe, basically there are 3 registers which store the status of the busy lines of all the detector in the 3 phases of acq. (after the trigger, when IDAQ set the busy and when iDAQ remove it)
33    UInt_t         patterntrig[6]; ///<What is used in the trigger. One has to do some bit shifting to check the values  
34    UInt_t         trigconf; ///<Gives the trigger configuration by bit shifting. For example: "trigconf & (1<<0)" => TOF1  /**
35     * \brief patterntrig[6]  What is used in the trigger. One has to do some bit shifting to check the values. Details see below.
36     *
37     * You can see which channel was used in the trigger. One has to do some bit shifting to check the values....\n
38     * Format of patterntrig(6) variable [referring to bit in TB_READ_PATTERN_TRIGGER raw variable] \n
39     * patterntrig(1) --> Calo [56 to 53] 4 bits \n
40     * patterntrig(2) --> S4 [52 to 50] 3 bits: 7 means S4 trigger, 6 means no S4 trigger \n
41     * patterntrig(3) --> S3 [49 to 38] 12 bits: (S32b,S32a,S31b,S31a) \n
42     * patterntrig(4) --> S2 [37 to 30] 8 bits: (S22b,S22a,S21b,S21a) \n
43     * patterntrig(5) --> S12 [29 to 18] 12 bits: (S12b,S12a) \n
44     * patterntrig(6) --> S11 [17 to 2] 16 bits: (S11b,S11a)  \n
45     */
46      UInt_t         patterntrig[6];
47    
48    /**
49     * \brief trigconf  Gives the trigger configuration by bit shifting. For example: "trigconf & (1<<0)" => TOF1. More Details see below
50     *
51     * Gives the trigger configuration by bit shifting, for example: \n
52     * if ( pam_event->GetTrigLevel2()->trigconf & (1<<0) ) printf(" TOF1\n")  \n
53     * and then analogue: \n
54     * trigconf & (1<<1) ) => TOF2 \n
55     * trigconf & (1<<2) ) => TOF3 \n
56     * trigconf & (1<<3) ) => TOF4 \n
57     * trigconf & (1<<4) ) => TOF5 \n
58     * trigconf & (1<<5) ) => TOF6 \n
59     * trigconf & (1<<6) ) => TOF7 \n
60     * trigconf & (1<<7) ) => S4 \n
61     * trigconf & (1<<8) ) => CALO \n
62     * trigconf & (1<<9) ) => CALIB_ON \n
63     * \n
64     * The "TRIGGER COMMAND INDEX" \n
65     * TB_SET_TRIGGER_CONF_01 => TOF_1 \n
66     * TB_SET_TRIGGER_CONF_02 => TOF_2 \n
67     * TB_SET_TRIGGER_CONF_03 => TOF_3 \n
68     * TB_SET_TRIGGER_CONF_04 => TOF_4 \n
69     * TB_SET_TRIGGER_CONF_05 => TOF_5 \n
70     * TB_SET_TRIGGER_CONF_06 => TOF_6 \n
71     * TB_SET_TRIGGER_CONF_07 => TOF_7 \n
72     * TB_SET_TRIGGER_CONF_08 => S4 \n
73     * TB_SET_TRIGGER_CONF_09 => CALO \n
74     * TB_SET_TRIGGER_CONF_10 => CALO + S4 \n
75     * TB_SET_TRIGGER_CONF_11 => TOF_1 + S4 \n
76     * TB_SET_TRIGGER_CONF_12 => TOF_2 + S4 \n
77     * TB_SET_TRIGGER_CONF_13 => TOF_3 + S4 \n
78     * TB_SET_TRIGGER_CONF_14 => TOF_4 + S4 \n
79     * TB_SET_TRIGGER_CONF_15 => TOF_5 + S4 \n
80     * TB_SET_TRIGGER_CONF_16 => TOF_6 + S4 \n
81     * TB_SET_TRIGGER_CONF_17 => TOF_7 + S4 \n
82     * TB_SET_TRIGGER_CONF_18 => TOF_1 + CALO \n
83     * TB_SET_TRIGGER_CONF_19 => TOF_2 + CALO \n
84     * TB_SET_TRIGGER_CONF_20 => TOF_3 + CALO \n
85     * TB_SET_TRIGGER_CONF_21 => TOF_4 + CALO \n
86     * TB_SET_TRIGGER_CONF_22 => TOF_5 + CALO \n
87     * TB_SET_TRIGGER_CONF_23 => TOF_6 + CALO \n
88     * TB_SET_TRIGGER_CONF_24 => TOF_7 + CALO \n
89     * TB_SET_TRIGGER_CONF_25 => TOF_1 + CALO + S4 \n
90     * TB_SET_TRIGGER_CONF_26 => TOF_2 + CALO + S4 \n
91     * TB_SET_TRIGGER_CONF_27 => TOF_3 + CALO + S4 \n
92     * TB_SET_TRIGGER_CONF_28 => TOF_4 + CALO + S4 \n
93     * TB_SET_TRIGGER_CONF_29 => TOF_5 + CALO + S4 \n
94     * TB_SET_TRIGGER_CONF_30 => TOF_6 + CALO + S4 \n
95     * TB_SET_TRIGGER_CONF_31 => TOF_7 + CALO + S4 \n
96     * \n
97     * TOF_1 = (S11 + S12) * (S21 + S22) * (S31 + S32) \n
98     * TOF_2 = (S11 * S12) * (S21 * S22) * (S31 * S32) \n
99     * TOF_3 = (S21 + S22) * (S31 + S32) \n
100     * TOF_4 = (S21 * S22) * (S31 * S32) \n
101     * TOF_5 = S12 * (S21 * S22) \n
102     * TOF_6 = (S11 + S12) * (S31 + S32) \n
103     * TOF_7 = (S11 * S12) * (S31 * S32) \n
104     * S4    = S4_1 \n
105     * CALO  = CALO_1 + CALO_2 + CALO_3 + CALO_4 \n
106     */
107      UInt_t         trigconf;
108    Int_t          unpackError; ///<is a flag set in case of CRC errors during the unpacking of data    Int_t          unpackError; ///<is a flag set in case of CRC errors during the unpacking of data
109    //    //
110    // here you can define methods to make life simplier during the analysis    // here you can define methods to make life simplier during the analysis
# Line 49  class TrigLevel2 : public TObject { Line 122  class TrigLevel2 : public TObject {
122    
123    
124    void Clear(); //emiliano    void Clear(); //emiliano
125      
126    ClassDef(TrigLevel2,2);    ClassDef(TrigLevel2,2);
127  };  };
128    
129  #endif  #endif
130    
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